From patchwork Sun Nov 16 13:46:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Kuba_Szczodrzy=C5=84ski?= X-Patchwork-Id: 73 Received: from s2.avantea.pl (s2.avantea.pl [46.242.128.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D588F35CBB7; Sun, 16 Nov 2025 13:46:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.242.128.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763300785; cv=none; b=mCYhbK1ORMYugR/DsgNy0tVrkuxKnjeiAq7VPHhDRikRJ+I0fiALblCXBj7F5TN2ksWWbwB/3eY9iALL3gzwIPP+RVGdVHbq5nUyoKGtWWv3W64tCGF9pMvqjAgR3ougDFQT72FCNHtz/dzlniHtdp1YiYghaXx6nRbJt/kuhZI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763300785; c=relaxed/simple; bh=N51ohFNYiQCe9IyT9Q4kylNtWvoKJv/iSiD7EtrPeXc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=mcXU0+DT57nkOKpDsMuhdXjIBxOPqk5bagCYpOrtODhMwJvIy/GAjk+MoI1T7NSuXdpjKYg3NxtaOdYfwizC6hU2KOADTSbLJZdaLnVaSilSsaneqUq/MAy1xip3WVPHj1doJDzMNNwrq93Zd0MIesoVFGxQI9w2/nqkYrGIttI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=szczodrzynski.pl; spf=pass smtp.mailfrom=szczodrzynski.pl; dkim=pass (2048-bit key) header.d=szczodrzynski.pl header.i=@szczodrzynski.pl header.b=QRQq1tC3; arc=none smtp.client-ip=46.242.128.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=szczodrzynski.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=szczodrzynski.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=szczodrzynski.pl header.i=@szczodrzynski.pl header.b="QRQq1tC3" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=szczodrzynski.pl; s=x; h=Content-Transfer-Encoding:Content-Type: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=neBdv8iX1GzhYleqbei0j00LB5MeX/K7/xRXvuHSj3k=; b=QRQq1tC3/5JgMlgc5qc18Ew0JI 8OQ3hwhiepGLSerb1Y8B6mSQxViwxUu8Syr4gNh6f77cyqLL/KEUYU2n9T28BSefEAi+eAKZH4fLp 7/ArIdSrAMH64Nj1wYW1urBFW4iARlJjn7gbxzyki9veXfxd/t6J1lVcSIc6v7uVlUe0JmaQ9WCei LTHnf7DHcmOHYBTPdvt1HHlYaaiHhU5BttI3qwXNL0fOyR9ox6eCzp/kY1sC5e+PlhT8YB33N6aen FgCypC9NaJJm0DF3yiDvAobIxsNTafMRLN1xGRZRpsrubFf3q5AAtcSTTNsZ7iuVQ2jUlWflURI6w 8eDVaoCA==; Received: from [62.171.184.96] (helo=buildhost.contaboserver.net) by s2.avantea.pl with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.1) (envelope-from ) id 1vKd57-0000000FXJG-0ubo; Sun, 16 Nov 2025 14:46:17 +0100 From: =?utf-8?q?Kuba_Szczodrzy=C5=84ski?= To: Maxime Ripard , Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , Maarten Lankhorst , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: David Airlie , Simona Vetter , linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, parthiban@linumiz.com, paulk@sys-base.io Subject: [PATCH v3 0/6] drm/sun4i: Support LVDS on D1s/T113 combo D-PHY Date: Sun, 16 Nov 2025 14:46:09 +0100 Message-Id: <20251116134609.447043-1-kuba@szczodrzynski.pl> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250221161751.1278049-1-kuba@szczodrzynski.pl> References: <20250221161751.1278049-1-kuba@szczodrzynski.pl> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Authenticated-Id: kuba@szczodrzynski.pl Status: O [replying to v1 to keep the same series on Patchwork] Some Allwinner chips (notably the D1s/T113 and the A100) have a "combo MIPI DSI D-PHY" which is required when using single-link LVDS0. The same PD0..PD9 pins are used for either DSI or LVDS. Other than having to use the combo D-PHY, LVDS output is configured in the same way as on older chips. This series enables the sun6i MIPI D-PHY to also work in LVDS mode. It is then configured by the LCD TCON, which allows connecting a single-link LVDS display panel. Changes in v2/v3: - Applied code formatting changes from review comments - Changed "dphy" to "combo-phy" - Made the LVDS setup/teardown functions abort early in case of error (adding a proper return value would require changes in several levels of caller functions; perhaps could be done in a separate patch) - Added the PHY properties to DT bindings - Renamed lvds0_pins to lcd_lvds0_pins - Rebased on top of drm/misc/kernel/for-linux-next - Hopefully corrected the incomplete patch list of v2, which happened due to an SMTP error Kuba Szczodrzyński (6): phy: allwinner: phy-sun6i-mipi-dphy: Support LVDS in combo D-PHY drm/sun4i: Support LVDS using MIPI DSI combo D-PHY drm/sun4i: Enable LVDS output on sun20i D1s/T113 dt-bindings: display: sun4i: Add D1s/T113 combo D-PHY bindings riscv: dts: allwinner: d1s-t113: Add D-PHY to TCON LCD0 riscv: dts: allwinner: d1s-t113: Add LVDS0 pins .../display/allwinner,sun4i-a10-tcon.yaml | 6 ++ .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++ drivers/gpu/drm/sun4i/sun4i_tcon.c | 50 +++++++++++++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++ drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 70 ++++++++++++++++++- 5 files changed, 141 insertions(+), 2 deletions(-)