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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j1-000vXD-36; Mon, 14 Sep 2026 17:36:07 +0200 From: Jonas Rebmann Subject: [PATCH v3 0/6] spi: spi-sun4i: assorted fixes Date: Mon, 14 Sep 2026 17:35:54 +0200 Message-Id: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAFoUqGoC/3XNTQ6DIBAF4KsY1qUBLH+ueo+mC5VRZ4MGlNgY7 1501cR0+d7kfbORCAEhkqrYSICEEUefQ3krSDvUvgeKLmcimFDMMkHjhDQu/oG0wxUi5bVkYAx zrW5IXk0BzkMevd45DxjnMXzOB4kf7X8rccoot9ZI6LRUunxO4PtlDqPH9e6AHGASv4i+IiIjG gyTSonGNu6C7Pv+BczCe1X4AAAA X-Change-ID: 20260902-spi-sun4i-fixes-1a50e880dc7b To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann , Tobias Schramm X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1729; i=jre@pengutronix.de; h=from:subject:message-id; bh=XAmn9nJo7CaPqbqmyZy+QjbGr44QUfm2xQnDLQyNRYM=; b=kA0DAAoW1JjkDZHO24AByyZiAGqoFGHIiBgsvUs2vKyJyW2LfE5bir6J1Pjem6tNVv3Jb3HnS oh1BAAWCgAdFiEEXSYeIBIzT9c2eT5d1JjkDZHO24AFAmqoFGEACgkQ1JjkDZHO24BJ7gEAgC4N JVZiAUkMBQfSHKo2hqZifVXU190/CXq8XH2ioPUA/1x3CATD4f2gqIXiKZDEc8x43r6bMP+O+Jt yf6zwC7UH X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= This is a series of patches for the spi-sun4i driver, some of which have been sitting around for a while. 1-4 are fixes and 5 is a small patch that introduces reporting of the effective SPI speed. Signed-off-by: Jonas Rebmann --- Changes in v3: - 4/6: Explain omission of superfluous TC bit clear in commit message - Link to v2: https://patch.msgid.link/20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de Changes in v2: - Add Patch 5/6 to fix division by zero potential in 6/6 - 3/6: Correctly subtract 1 to gain the register value for SUN4I_CLK_CTL_CDR1 - Mitigate race condition potential in 4/6 by disabling and syncing interrupts before sun4i_spi_drain_fifo() in the timeout path - Link to v1: https://patch.msgid.link/20260902-spi-sun4i-fixes-v1-0-19985ef75673@pengutronix.de --- Jonas Rebmann (1): spi: spi-sun4i: sun4i_spi_transfer_one(): add error handling at clock setup Marc Kleine-Budde (5): spi: spi-sun4i: sun4i_spi_transfer_one(): fix transfers for SUN4I_FIFO_DEPTH spi: spi-sun4i: sun4i_spi_fill_fifo(): always apply A10 FIFO fill level workaround spi: spi-sun4i: sun4i_spi_transfer_one(): fix setting of clock rate spi: spi-sun4i: sun4i_spi_handler(): fix race condition between transfer completion and RX FIFO interrupt spi: spi-sun4i: sun4i_spi_transfer_one(): report effectively used speed_hz of transfer drivers/spi/spi-sun4i.c | 68 +++++++++++++++++++++++++++++-------------------- 1 file changed, 40 insertions(+), 28 deletions(-) --- base-commit: 89a312991dc6e638a36adc43ccb91dbc25504c04 change-id: 20260902-spi-sun4i-fixes-1a50e880dc7b Best regards, -- Jonas Rebmann