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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a6dfb41452sm3428139fac.4.2026.10.14.18.34.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 18:34:08 -0700 (PDT) From: James Hilliard Subject: [PATCH v7 00/16] mtd: rawnand: sunxi: fix transfers and support randomized OOB Date: Wed, 14 Oct 2026 19:33:47 -0600 Message-Id: <20261014-submit-sunxi-nand-vendor-oob-layout-v1-v7-0-5d3fc6ad2da1@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAAAAAAC/5XQTWrDMBAF4KsErasyI40lO6veo3ShPycqsVRsx yQE371yuqipNy4IxIPhm+E92BD6GAZ2PDxYH6Y4xJxK0C8H5s4mnQKPvmQmQCioEfhwtV0cy5d ukSeTPJ9C8rnnOVt+Mfd8HfmEPEhE8gjONY4V7KsPbbw9F71//OQifQY3LvoycY7DmPv785IJl 7l/Ly0POClZV9IgGd+8nToTL68ud2xZOolftgHazYrCWhSgqSXjjP7LyjXb7GZlYWtZOwvWYEU bllYsit0sLSUYRTb4hoTYlFCtWbmbrQqrvUYErYxqN9eqNbu/W1VY0VqoqQ2gK1yz8zx/A8liD TGhAgAA X-Change-ID: 20260810-submit-sunxi-nand-vendor-oob-layout-v1-e3114d10cc9c To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Richard Genoud , Boris Brezillon , Masahiro Yamada , Brian Norris , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, devicetree@vger.kernel.org, James Hilliard , Conor Dooley X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.16 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.15)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; FORGED_SENDER_MAILLIST(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[25]; PRECEDENCE_BULK(0.00)[]; FREEMAIL_CC(0.00)[kernel.org,gmail.com,sholland.org,bootlin.com,socionext.com,lists.infradead.org,lists.linux.dev,vger.kernel.org,microchip.com]; TAGGED_RCPT(0.00)[dt]; DBL_BLOCKED_OPENRESOLVER(0.00)[msgid.link:url,tor.lore.kernel.org:rdns,tor.lore.kernel.org:helo]; RCVD_COUNT_FIVE(0.00)[6]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.90.174.1:received]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MIME_TRACE(0.00)[0:+]; TAGGED_FROM(0.00)[bounces-26648-noreply=patchwork.local]; RECEIVED_SPAMHAUS_PBL(0.00)[174.29.1.49:received]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: 453111C2272 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= Patches 1-14 address the existing driver independently of the Allwinner randomized-OOB format in patches 15-16. Please review and apply that prefix regardless of whether the format extension is accepted. It preserves the existing on-flash ECC geometry, bad-block-marker representation and raw callbacks. Patch 1 centralizes OOB handling without changing behavior. Patches 2-10 fix logical-step lengths, read and write error handling, completion reuse, pattern-ID selection, duplicate program confirms, small-page read commands and the H6/H616 user-data register limit. Patches 11-14 then reduce repeated status reads, column changes, chip setup and length-register accesses. The pattern-ID fix precedes status caching so correctness can be reviewed before the register-access optimization. Here, "user data" means ECC-protected metadata in OOB, not the page's main data. PIO reuses hardware slot zero for each logical ECC step; DMA can transfer several steps at once. The patches distinguish logical steps, hardware slots and packed register offsets, and explain their triggering conditions independently of the format work that prompted the review. The IRQ fix retains timeout-only disable_irq() and explains both the forced-threaded PREEMPT_RT race and the unbounded cleanup/no-priority- inheritance tradeoff. The small-page fix is limited to read-side repositioning within existing geometry restrictions. DMA batching preserves the installed OOB layout rather than capping its allocation. For devices provisioned with the Allwinner normal-page format, support is required compatibility with existing flash contents, not a preference for another layout. Its bad-block marker is randomized: applying the existing plain-marker compensation can make normal OOB reads and bad-block scans interpret good blocks as bad. Switching formats is not a transparent kernel upgrade. Patch 15 documents the opt-in binding; patch 16 implements the format through separate OOB callbacks and an attach helper. Its geometry, page-wide classification and contiguous parity reads stay together. Without the property, existing format selection and callbacks are unchanged. Assisted-by: Codex:gpt-6-astra Signed-off-by: James Hilliard Changes in v7: - Put a behavior-preserving OOB refactor first, the correctness fixes next, register-access optimizations after them, and the binding and Allwinner format last. Keep 16 patches with no external prerequisites. - Keep logical-step length, read recovery, IRQ lifetime, write failures, pattern IDs and DMA limits independently reviewable. Correct pattern-ID selection before introducing per-transfer status caching. - Update both DMA callers with the protected-OOB helper contract in the logical-step length fix, before the later batching change. - Isolate format policy behind its own callbacks and one opt-in attach path. Fold packed H6/H616 geometry and contiguous parity reads into the final patch, leaving existing format callbacks unchanged. - Use scrambled_plain_bbm_oob for the existing scrambled profile and allwinner_oob for the firmware profile. Keep shared randomizer helpers generic and name the H6-generation spare predicate after H6. - Clarify protected-OOB terminology, logical/hardware indices, transfer failures and the limited small-page read scope. Explain the RT timeout mechanism and disable_irq() tradeoff discussed with Miquel Raynal. - Explain installed-format compatibility and that the spare check re-encodes ECC-decoded protected OOB rather than rereading physical bytes. - Drop the standalone OOB-helper renaming cleanup and explicit stable Cc trailers; retain Fixes tags and Conor Dooley's binding Acked-by. - Rebase onto current MTD nand/next. - Link to v6: https://patch.msgid.link/20260914-submit-sunxi-nand-vendor-oob-layout-v1-v6-0-2fb084fe0751@gmail.com Changes in v6: - retain the bank-sized first DMA batch, but transfer later logical steps individually to avoid PAGE_OP's absolute internally generated main columns - keep ECC exception mode enabled for randomized reads on all supported controllers, using the shared physical-pattern classifier - classify uniform-pattern steps even when hardware suppresses their ECC errors; skip their correction counters and preserve decoded buffers unless the page-wide zero override or vendor spare predicate accepts the page - Link to v5: https://patch.msgid.link/20260913-submit-sunxi-nand-vendor-oob-layout-v1-v5-0-7d711076a6f7@gmail.com Changes in v5: - add a separate small-page command-handling fix: use READ0/READ1/READOOB with the page address for rereads and normal OOB access, and select PIO instead of the large-page DMA sequencer - keep physical reread errors visible, preserve the OOB cursor and retain the existing ECC geometry requirements, including rejection of 512+16 with controller ECC - group the small-page fix and the DMA register-bank fix with the opening fixes, ahead of cleanups, bindings, format support and optimizations - make the DMA register-bank fix independent of randomized-OOB support and the later register-access optimizations - Link to v4: https://patch.msgid.link/20260912-submit-sunxi-nand-vendor-oob-layout-v1-v4-0-4a64bed94229@gmail.com Changes in v4: - prepend an independent fix for completion reuse and IRQ timeout races: initialize the completion once, finish IRQ register updates before signalling success, and drain timed-out handlers before clearing their interrupt state - add a separate fix for aggregate protected-user-data register overflow by splitting DMA transfers into bounded batches, retaining the existing OOB layout, ECC offsets and DMA support - distinguish logical page steps from batch-local hardware slots, retain page-wide ECC accounting and avoid retrying partially transferred writes - Link to v3: https://patch.msgid.link/20260909-submit-sunxi-nand-vendor-oob-layout-v1-v3-0-838cb0ba1547@gmail.com Changes in v3: - add a prerequisite fix for the logical OOB length used by PIO transfers - clarify logical ECC steps versus hardware slots and share protected-OOB register indexing - select the controller-specific vendor spare-byte erased-page check from the SoC capabilities, only in randomized-OOB mode and without rereading the main data - retain hardware-decoded data and protected OOB on other ECC failures for bad-block and BBT pattern scans (reported by Miquel Raynal) - retain a bad marker and ECC failure for all-zero physical pages, and disable the ECC exception for the vendor format - share page classification between PIO and DMA, reading complete pages for randomized-format subpage requests - propagate OOB read errors and defer randomized-format ECC accounting until those reads have succeeded - propagate read/program setup, column-change and buffer-transfer errors, including extra OOB; stop failed writes and disable ECC and randomization - discard partial DMA ECC statistics before retrying in PIO, and keep correction counts separate from successful OOB-transfer status - select the current hardware step's pattern ID instead of slot zero - avoid a second program confirm after an OOB-only write - avoid redundant column changes before writing extra OOB bytes - reject oversized ECC steps in randomized-OOB mode before the core can fall back to software ECC - combine adjacent parity and trailing OOB reads in randomized-OOB mode - remove duplicate chip setup immediately before core page commands - program each packed DMA user-data length register once per operation, and write PIO slot zero directly without read-modify-write - reuse pattern IDs and packed error counters within a DMA read, while refreshing the snapshot after every PIO ECC operation - Link to v2: https://patch.msgid.link/20260904-submit-sunxi-nand-vendor-oob-layout-v1-v2-0-b12074f4aca7@gmail.com Changes in v2: - rebase on the current MTD nand/next branch - retain the merged protected-OOB allocation, BBM reservation and stack-buffer fixes - clarify that randomization is part of the normal hardware-ECC page format while MTD_OPS_RAW continues to expose physical bytes - explain why a BSP-compatible BBM remains randomized in physical raw data - document the decoded bad-block and flash-BBT access paths - reject the firmware OOB format with software or disabled ECC - document the BSP page-format compatibility contract and the older-controller format audit - Link to v1: https://patch.msgid.link/20260810-submit-sunxi-nand-vendor-oob-layout-v1-v1-0-463853a14ad9@gmail.com --- James Hilliard (16): mtd: rawnand: sunxi: centralize OOB handling mtd: rawnand: sunxi: use the logical step's OOB length in PIO mtd: rawnand: sunxi: propagate page-setup and erased-check errors mtd: rawnand: sunxi: drain interrupts before reusing the completion mtd: rawnand: sunxi: stop failed program operations and disable ECC mtd: rawnand: sunxi: select the pattern ID for the current ECC step mtd: rawnand: sunxi: propagate buffer and column transfer errors mtd: rawnand: sunxi: avoid a second program confirm for OOB writes mtd: rawnand: sunxi: use page reads to reposition small-page NAND mtd: rawnand: sunxi: bound DMA batches by the user-data register bank mtd: rawnand: sunxi: reuse ECC status within each transfer mtd: rawnand: sunxi: avoid redundant column changes for extra OOB mtd: rawnand: sunxi: avoid duplicate chip setup before page commands mtd: rawnand: sunxi: reduce user-data length register accesses dt-bindings: mtd: sunxi: Add randomized OOB flag mtd: rawnand: sunxi: support the Allwinner randomized OOB format .../bindings/mtd/allwinner,sun4i-a10-nand.yaml | 10 + drivers/mtd/nand/raw/sunxi_nand.c | 1537 ++++++++++++++------ 2 files changed, 1065 insertions(+), 482 deletions(-) --- base-commit: 30daaf3e7897b4a8d9b72e5b0c86dd6e2a4d7d85 change-id: 20260810-submit-sunxi-nand-vendor-oob-layout-v1-e3114d10cc9c Best regards, -- James Hilliard