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Sun, 20 Jul 2025 04:51:53 -0400 (EDT) From: Ryan Walklin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Ryan Walklin Subject: [PATCH v2 09/12] arm64: dts: allwinner: h616: add display engine, bus and mixer nodes Date: Sun, 20 Jul 2025 20:48:47 +1200 Message-ID: <20250720085047.5340-10-ryan@testtoast.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250720085047.5340-1-ryan@testtoast.com> References: <20250720085047.5340-1-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Status: O The Allwinner H616 and variants (H618, H700 and T507) have a new display engine variant (DE33). Support has been added to the existing DE2/DE3 sun4i driver in a previous patch series [1]. The variant is selected via the appropriate mixer device tree compatible string. Add the respective device-tree nodes for the DE, bus, clock and mixer to the H616 DTSI, and the matching SRAM section for the DE. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin [1] https://lore.kernel.org/linux-sunxi/20250528092431.28825-1-ryan@testtoast.com --- Changelog v1..v2: - Use A64 fallback for bus driver rather than add additional compatible in driver, enum added to dt-binding in previous patch. - amend order of display clocks (bus/mod) to match dt binding. - add mixer register names. - removed IOMMU binding due to late binding warning likely reflecting sunxi IOMMU driver bug. This is not required for RGB LCD output. - use H616 compatibles - Update SRAM name to DE33 --- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index ceedae9e399b..7347332f54a7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -94,6 +94,12 @@ l2_cache: l2-cache { }; }; + de: display-engine { + compatible = "allwinner,sun50i-h616-display-engine"; + allwinner,pipelines = <&mixer0>; + status = "disabled"; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -150,6 +156,52 @@ soc { #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + bus: bus@1000000 { + compatible = "allwinner,sun50i-h616-de33", + "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de33_sram 1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1000000 0x400000>; + + display_clocks: clock@8000 { + compatible = "allwinner,sun50i-h616-de33-clk"; + reg = <0x8000 0x100>; + clocks = <&ccu CLK_BUS_DE>, + <&ccu CLK_DE>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@100000 { + compatible = "allwinner,sun50i-h616-de33-mixer-0"; + reg = <0x100000 0x100000>, + <0x8100 0x40>, + <0x280000 0x20000>; + reg-names = "layers", "top", "display"; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + reg = <1>; + + mixer0_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer0_in_mixer0>; + }; + }; + }; + }; + }; + gpu: gpu@1800000 { compatible = "allwinner,sun50i-h616-mali", "arm,mali-bifrost"; @@ -188,6 +240,12 @@ sram_c: sram@28000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00028000 0x30000>; + + de33_sram: sram-section@0 { + compatible = "sun50i-h616-sram-c", + "allwinner,sun50i-a64-sram-c"; + reg = <0x0000 0x1e000>; + }; }; };