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Sun, 20 Jul 2025 04:52:09 -0400 (EDT) From: Ryan Walklin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Ryan Walklin , Chris Morgan Subject: [PATCH v2 12/12] arm64: dts: allwinner: rg35xx: Enable LCD output Date: Sun, 20 Jul 2025 20:48:50 +1200 Message-ID: <20250720085047.5340-13-ryan@testtoast.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250720085047.5340-1-ryan@testtoast.com> References: <20250720085047.5340-1-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Status: O The RG35XX has a 640x480 RGB/SPI LCD panel, supported by the SoC display pipeline and an NV3052C controller. The H616 SOC's GPIO bank D contains the muxed display pins for RGB and LVDS output support. The backlight for this device is not modelled as the PWM driver for the H616 is not yet implemented. Enable the display engine and LCD timing controller, configure the panel, and add a fixed 3.3v GPIO-controlled regulator for the panel, and a VCC supply for the display pins as per the other GPIO banks. Signed-off-by: Chris Morgan Tested-by: Philippe Simons Signed-off-by: Ryan Walklin Changelog v1..v2: - Remove GPIO backlight node. --- .../sun50i-h700-anbernic-rg35xx-2024.dts | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) cpu-supply = <®_dcdc1>; }; +&de { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -220,6 +267,7 @@ &ohci0 { &pio { vcc-pa-supply = <®_cldo3>; vcc-pc-supply = <®_cldo3>; + vcc-pd-supply = <®_cldo3>; vcc-pe-supply = <®_cldo3>; vcc-pf-supply = <®_cldo3>; vcc-pg-supply = <®_aldo4>; @@ -379,3 +427,11 @@ &usbotg { &usbphy { status = "okay"; }; + +&tcon_lcd0 { + status = "okay"; +}; + +&tcon_lcd0_out_lcd { + remote-endpoint = <&panel_in_rgb>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts index 1a750c5f6fac..7d1da4463adf 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts @@ -181,6 +181,49 @@ reg_vcc5v: regulator-vcc5v { /* USB-C power input */ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + reg_lcd: regulator-gpio-lcd-vdd { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vdd-lcd"; + gpio = <&pio 8 15 GPIO_ACTIVE_HIGH>; // PI15 + enable-active-high; + }; + + spi_lcd: spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&pio 8 9 GPIO_ACTIVE_HIGH>; // PI9 + mosi-gpios = <&pio 8 10 GPIO_ACTIVE_HIGH>; // PI10 + cs-gpios = <&pio 8 8 GPIO_ACTIVE_HIGH>; // PI8 + num-chipselects = <1>; + + panel: panel@0 { + compatible = "anbernic,rg35xx-plus-panel"; + + reg = <0>; + + spi-max-frequency = <3125000>; + spi-3wire; + + reset-gpios = <&pio 8 14 GPIO_ACTIVE_LOW>; // PI14 + + power-supply = <®_lcd>; + + pinctrl-0 = <&lcd0_rgb888_pins>; + pinctrl-names = "default"; + + port { + panel_in_rgb: endpoint { + remote-endpoint = <&tcon_lcd0_out_lcd>; + }; + }; + }; + }; }; &codec { @@ -196,6 +239,10 @@ &cpu0 {