From patchwork Fri Sep 19 00:00:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 988 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C78B010E3 for ; Fri, 19 Sep 2025 00:01:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758240083; cv=none; b=H5zb5wCciq/jL15jUvNIsMBmh7CDpXOV1LCMwBaghzu2s/YlzACHTKMrgfXq6M0nYFy2naqTEICJsG3HODLoo1JZ8sJoRvYUjmwhurD+bVVDV2HceABJyYqt6KvpdNwYD4yrKRRw/fGPo2cRAV0PBdy36vCrGNapAwP8piVhllQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758240083; c=relaxed/simple; bh=w1JZP16dHFAp2HzwYCVCO5AvFOMNfcErG9cWpNaZHRM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lsEYbJlipY/qTMoFYrWuYQtsNcoUD0OfTwUzRi/f17IOSnQbsxMv5ZJA2dpbE194IB2QUjzUxYRwqqcDHWAFK93utnWZfYx9GeG9z3I3Qj9BxpuqrbPPg4ZPxFi/Jhdaoj5nW7TMdIlDrWFtiKYiRVYCeQAseO4gleQZqb54R5M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CF0FD1764; Thu, 18 Sep 2025 17:01:11 -0700 (PDT) Received: from minigeek.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C2AD83F673; Thu, 18 Sep 2025 17:01:17 -0700 (PDT) From: Andre Przywara To: Lee Jones , Chen-Yu Tsai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jernej Skrabec , Samuel Holland , Liam Girdwood , Mark Brown Cc: devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mikhail Kalashnikov Subject: [RFC PATCH 1/5] dt-bindings: mfd: x-powers,axp152: Add polyphased property Date: Fri, 19 Sep 2025 01:00:16 +0100 Message-ID: <20250919000020.16969-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.4 In-Reply-To: <20250919000020.16969-1-andre.przywara@arm.com> References: <20250919000020.16969-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Status: O Some X-Powers AXP PMICs can combine some of their DC/DC buck converter outputs in a multi-phase fashion, to achieve higher currents and decrease the output ripple. The datasheets call this poly-phase. This is programmable in the PMIC, although often set up as the PMIC's reset default. Add the "x-powers,polyphased" property to the binding, to describe those pairs or tuples of regulators that should work together. In the lead regulator node, the property lists the phandles of the connected regulators. Just an empty property means no poly-phasing. Signed-off-by: Andre Przywara --- .../devicetree/bindings/mfd/x-powers,axp152.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml index 45f015d63df16..260c4c0afc475 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -304,6 +304,15 @@ properties: noise. This probably makes sense for HiFi audio related applications that aren't battery constrained. + x-powers,polyphased: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of phandles pointing to other regulators that should be + polyphased with this regulator. The linked regulators will be + synchronised with this regulator, within the PMIC, but only if + supported by the PMIC. An empty list means this regulator + should be configured in a single-phase setup. + additionalProperties: false required: @@ -377,6 +386,7 @@ examples: regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1450000>; regulator-name = "vdd-cpu"; + x-powers,polyphased = <®_dcdc4>; }; reg_dcdc3: dcdc3 { @@ -386,6 +396,10 @@ examples: regulator-name = "vdd-int-dll"; }; + reg_dcdc4: dcdc4 { + /* dual-phased with DCDC2 */ + }; + reg_ldo1: ldo1 { /* LDO1 is a fixed output regulator */ regulator-always-on;