From patchwork Fri Oct 10 08:40:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Genoud X-Patchwork-Id: 831 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DED0E2773FC for ; Fri, 10 Oct 2025 08:41:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760085703; cv=none; b=ZtUbHY/ZqE6pX4VxIouVGw5XGZfZTIVmnpxajBeWkMuid4K/nuqxWC2cgPu+iyODBmBSiwHjPhFb32jJMVPPANZf3k+gxkeb5m94hwme5TmM/cGz2aCNjSpMmJMNVlYd3adCq/TIbCLUGbAB/mzI8RjeDKtf70o3ulbnA1QDvno= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760085703; c=relaxed/simple; bh=+7V21fBKZ9/1ScwLG5W7UyIa+lYLz9cIdKSghh1Pr8s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FvlP6jX4o0FDINYU0INFOg31lkee59pNvoi9KlWXuWiOM7Lt6ksFMnsfIZuQnd7WuCvgD6O3i2g3Ez8s55XtB2CNpeBLQAOx/YXB7fWQQFqkyCzvosxJcGTQRUHLP6FGaExSi3d9c86EIFH4I75fj7buH6/PiRZleVbhecR8oJw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=G1sVoDR7; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="G1sVoDR7" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 7F6DB1A127F; Fri, 10 Oct 2025 08:41:40 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5410E60667; Fri, 10 Oct 2025 08:41:40 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D5C4D102F2206; Fri, 10 Oct 2025 10:41:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1760085699; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=hVZorgzw7GlkbAdhTKmVPXOZ3kOeGcl6Fd44HKki10Y=; b=G1sVoDR7mhyS/3l1/qp5qMx0gdaSfLz5nK74NQEqMU8O721Wx10zNs8xOReVRkIDWQrkuH 1YUVf5DFMkYPUIsBi36RBOJDS/qyi9OA/A5V84UmSkaGmXb4JAGIuOFYj4F8Qvry2NClc/ ayRjDsNNoVmYXZFzHo4n/xk2WYNTUnwN6NtE1KYpRTyJH17mRdWajoP6Nj+O8AeFZlV6FG 8RpPQped2jZFfI8SnyGq38Y3KspzWOb3XZMtLwip5wpel2Zj69zZW6TKof0yraQuP+SF1N JxMOsL70q7r916vYuo82Q+HhIF/duRkazFHhZ6xeomTh6t7YqNr6dsugl6NiTA== From: Richard Genoud To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Wentao Liang , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Maxime Ripard , Thomas Petazzoni , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Richard Genoud Subject: [PATCH 04/15] mtd: nand: sunxi: move ecc strenghts in sunxi_nfc_caps Date: Fri, 10 Oct 2025 10:40:31 +0200 Message-ID: <20251010084042.341224-5-richard.genoud@bootlin.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251010084042.341224-1-richard.genoud@bootlin.com> References: <20251010084042.341224-1-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 Status: O H6/H616 has more ecc strenghts. This commit prepares the change. No functional change. Signed-off-by: Richard Genoud --- drivers/mtd/nand/raw/sunxi_nand.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index 10a48e0d361f..198dd40f9220 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -213,11 +213,15 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) * through MBUS on A23/A33 needs extra configuration. * @reg_io_data: I/O data register * @dma_maxburst: DMA maxburst + * @ecc_strengths: Available ECC strengths array + * @nstrengths: Size of @ecc_strengths */ struct sunxi_nfc_caps { bool has_mdma; unsigned int reg_io_data; unsigned int dma_maxburst; + const u8 *ecc_strengths; + unsigned int nstrengths; }; /** @@ -1619,9 +1623,9 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, struct nand_ecc_ctrl *ecc, struct device_node *np) { - static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 }; struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); + const u8 *strengths = nfc->caps->ecc_strengths; struct mtd_info *mtd = nand_to_mtd(nand); struct nand_device *nanddev = mtd_to_nanddev(mtd); int nsectors; @@ -1645,7 +1649,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, ecc->strength = bytes * 8 / fls(8 * ecc->size); - for (i = 0; i < ARRAY_SIZE(strengths); i++) { + for (i = 0; i < nfc->caps->nstrengths; i++) { if (strengths[i] > ecc->strength) break; } @@ -1666,7 +1670,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, } /* Add ECC info retrieval from DT */ - for (i = 0; i < ARRAY_SIZE(strengths); i++) { + for (i = 0; i < nfc->caps->nstrengths; i++) { if (ecc->strength <= strengths[i]) { /* * Update ecc->strength value with the actual strength @@ -1677,7 +1681,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, } } - if (i >= ARRAY_SIZE(strengths)) { + if (i >= nfc->caps->nstrengths) { dev_err(nfc->dev, "unsupported strength\n"); return -ENOTSUPP; } @@ -2167,15 +2171,23 @@ static void sunxi_nfc_remove(struct platform_device *pdev) dma_release_channel(nfc->dmac); } +static const u8 sunxi_ecc_strengths_a10[] = { + 16, 24, 28, 32, 40, 48, 56, 60, 64 +}; + static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = { .reg_io_data = NFC_REG_A10_IO_DATA, .dma_maxburst = 4, + .ecc_strengths = sunxi_ecc_strengths_a10, + .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10), }; static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = { .has_mdma = true, .reg_io_data = NFC_REG_A23_IO_DATA, .dma_maxburst = 8, + .ecc_strengths = sunxi_ecc_strengths_a10, + .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10), }; static const struct of_device_id sunxi_nfc_ids[] = {