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Fri, 06 Mar 2026 07:47:33 -0800 (PST) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:6d2b:ebde:c946:11eb]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-439dae35cf7sm5122767f8f.26.2026.03.06.07.47.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2026 07:47:32 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 06 Mar 2026 16:46:45 +0100 Subject: [PATCH net-next v7 7/7] net: stmmac: qcom-ethqos: add support for sa8255p Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260306-qcom-sa8255p-emac-v7-7-d6a3013094b7@oss.qualcomm.com> References: <20260306-qcom-sa8255p-emac-v7-0-d6a3013094b7@oss.qualcomm.com> In-Reply-To: <20260306-qcom-sa8255p-emac-v7-0-d6a3013094b7@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Vinod Koul , Giuseppe Cavallaro , Jose Abreu , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Matthew Gerlach , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Keguang Zhang , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Jan Petrous , s32@nxp.com, Romain Gantois , Lad Prabhakar , Heiko Stuebner , Chen Wang , Inochi Amaoto , Emil Renner Berthing , Minda Chen , Drew Fustini , Guo Ren , Fu Wei , Nobuhiro Iwamatsu , Geert Uytterhoeven , Magnus Damm , Maxime Ripard , Shuang Liang , Zhi Li , Shangjuan Wei , "G. Jaya Kumaran" , Clark Wang , Linux Team , Frank Li , David Wu , Samin Guo , Christophe Roullier , Swathi K S , Bartosz Golaszewski , Mohd Ayaan Anwar Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Drew Fustini , linux-sunxi@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-mips@vger.kernel.org, imx@lists.linux.dev, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, brgl@kernel.org, Bartosz Golaszewski , Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=11062; i=bartosz.golaszewski@oss.qualcomm.com; h=from:subject:message-id; bh=BKhKJbICc8tI75o/engfT3L3gUjtRZVnMoUMnjfOnYM=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBpqvbxEYxj6MZAAMZo860nypNVfQKsnyjcfWK0/ aDMuIsnoxuJAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCaar28QAKCRAFnS7L/zaE wychD/wP2KGziFxXaHa0/fP7oDwaE6O0o7aCs3po4B6+ZVEGXUKPJmOAJ22pZPgKNyBVPSQ67Vt wJ3xZhWR0vqqWhQX1H/2EBiHBD+KWnPJq10dqzxYJFwc24bTpTvF5tGpUxzzyciU6DZlf7ssNmI 90JgRVXBmpKJ85lETVVCc+0eAmddOj6wjR2ubl4udouuD/J3o90DS0AP3HNdgdoyAOw/x2bKW1K 3pF7CD7/efEWW42cY0h7GYUwjTRcJ1/aqB0d00Dyns+Ex7I871T1v2osXRWtl448wXk/J8TmCHN buQpatkND14BFbc8ZQqidsCoE5jnNLsM0BoNpCQLi2eGrYEZNDyZUMLGqmz/eK9qP4QYoxrYbF/ COvKuxW2bLw37Bntpd5UWf1ih+BPu5Y6R4i4W4r2XIOEc40k/cy0uMNsaRLuZ1ToBCt1SWqGYVj 4OL3IUS5Fg1Dvg0Jkmydf3pM+fTxXFsqm8TwgxR/EAAvgpl+KTFIUhQEmKzmOnaP7MqajSC327d vFF2nSjwy7vhyEz/wDRoFRLA3FmmWRAwigxxi0Dk52BhSMqrv7PtdCiJQ065Cl9aDw10IGSyyj6 V9Kk9UChOFFo1cHvhQym6wqG3Ju5Few6KPD6WQb88Yq2pl7pwSpqXCJ+6jHbL1FhRMgdoCg9OZ/ 1IfCmLd3qqtmHpQ== X-Developer-Key: i=bartosz.golaszewski@oss.qualcomm.com; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 X-Proofpoint-GUID: sHz27oPDFKRUbWSKcfBumByoq7CaqbOG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA2MDE0NiBTYWx0ZWRfX7MID0Mvznkf+ YEk8AyY2uv/HfiKGkny9XeR05lV5X6BMtCAYuxZ+0GZPzUae/mdfCSratl51UrGndAVT7FEnVfm oo23OmBMr/vpc3CmBEQp4Us0NZzvJK74RuhaUm1dh5foBeLxnQSTsgC06Sxq4PfwFUi+Yl4zUjp NiYK+jHksceOY61pUXwDJ5SiO1J1ST69/zoD8xjRNuAZ72Y4V7gremm89khmkEnvQ0EHO8+CZWs 15WGVUIcWc4aEEMcVxKEqHwFWrLlH1DwxjWDKWnzReDMJhWJKRpNVh/CAmiIHS9kdXMfDuO8wiK jGOIUfTFPvfprtPqbtN7pINg85Jq19z6i/h1yvseTSoO79SchwzyfwD84QLlWL2s9aYzIjShSYe Gpu7wuek0zmvirW/4onoOedLeIFbvxUkSjbITW7sISf7ld9RCt0YEDNdr1CEShIZASToWLT/KIP TvnDOKqhXY50QGy6J8g== X-Authority-Analysis: v=2.4 cv=LbcxKzfi c=1 sm=1 tr=0 ts=69aaf716 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=gYhETRYomtM5McKHAMIA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: sHz27oPDFKRUbWSKcfBumByoq7CaqbOG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-06_04,2026-03-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 adultscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603060146 Status: O From: Bartosz Golaszewski Extend the driver to support a new model - sa8255p. Unlike the previously supported variants, this one's power management is done in the firmware using SCMI. This is modeled in linux using power domains so add support for them. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bartosz Golaszewski --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 230 ++++++++++++++++++--- 1 file changed, 205 insertions(+), 25 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 038ca4da3cff4eaac1d1255573f32e0c87701e78..64f2b5dd4110765fa0931e3e5ca1c98d9d906bb9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include #include "stmmac.h" #include "stmmac_platform.h" @@ -81,6 +83,13 @@ #define SGMII_10M_RX_CLK_DVDR 0x31 +enum ethqos_pd_selector { + ETHQOS_PD_CORE = 0, + ETHQOS_PD_MDIO, + ETHQOS_PD_SERDES, + ETHQOS_NUM_PDS, +}; + struct ethqos_emac_por { unsigned int offset; unsigned int value; @@ -98,6 +107,9 @@ struct ethqos_emac_driver_data { struct ethqos_emac_pm_data { const char *link_clk_name; + bool use_domains; + struct dev_pm_domain_attach_data pd; + unsigned int clk_ptp_rate; }; struct ethqos_emac_match_data { @@ -111,12 +123,19 @@ struct ethqos_emac_pm_ctx { struct phy *serdes_phy; }; +struct ethqos_emac_pd_ctx { + struct dev_pm_domain_list *pd_list; +}; + struct qcom_ethqos { struct platform_device *pdev; void __iomem *rgmii_base; int (*configure_func)(struct qcom_ethqos *ethqos, int speed); - struct ethqos_emac_pm_ctx pm; + union { + struct ethqos_emac_pm_ctx pm; + struct ethqos_emac_pd_ctx pd; + }; phy_interface_t phy_mode; int serdes_speed; int (*set_serdes_speed)(struct qcom_ethqos *ethqos); @@ -340,6 +359,25 @@ static const struct ethqos_emac_match_data emac_sa8775p_data = { .pm_data = &emac_sa8775p_pm_data, }; +static const char * const emac_sa8255p_pd_names[] = { + "core", "mdio", "serdes" +}; + +static const struct ethqos_emac_pm_data emac_sa8255p_pm_data = { + .pd = { + .pd_flags = PD_FLAG_NO_DEV_LINK, + .pd_names = emac_sa8255p_pd_names, + .num_pd_names = ETHQOS_NUM_PDS, + }, + .use_domains = true, + .clk_ptp_rate = 230400000, +}; + +static const struct ethqos_emac_match_data emac_sa8255p_data = { + .drv_data = &emac_v4_0_0_data, + .pm_data = &emac_sa8255p_pm_data, +}; + static int ethqos_dll_configure(struct qcom_ethqos *ethqos) { struct device *dev = ðqos->pdev->dev; @@ -406,6 +444,28 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) return 0; } +static int qcom_ethqos_domain_on(struct qcom_ethqos *ethqos, + enum ethqos_pd_selector sel) +{ + struct device *dev = ethqos->pd.pd_list->pd_devs[sel]; + int ret; + + ret = pm_runtime_resume_and_get(dev); + if (ret < 0) + dev_err(ðqos->pdev->dev, + "Failed to enable the power domain for %s\n", + dev_name(dev)); + return ret; +} + +static void qcom_ethqos_domain_off(struct qcom_ethqos *ethqos, + enum ethqos_pd_selector sel) +{ + struct device *dev = ethqos->pd.pd_list->pd_devs[sel]; + + pm_runtime_put_sync(dev); +} + static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed) { struct device *dev = ðqos->pdev->dev; @@ -622,6 +682,13 @@ static int ethqos_set_serdes_speed_phy(struct qcom_ethqos *ethqos) return phy_set_speed(ethqos->pm.serdes_phy, ethqos->serdes_speed); } +static int ethqos_set_serdes_speed_pd(struct qcom_ethqos *ethqos) +{ + struct device *dev = ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + + return dev_pm_opp_set_level(dev, ethqos->serdes_speed); +} + static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed) { if (ethqos->serdes_speed != speed) { @@ -719,6 +786,28 @@ static void qcom_ethqos_serdes_powerdown(struct net_device *ndev, void *priv) phy_exit(ethqos->pm.serdes_phy); } +static int qcom_ethqos_pd_serdes_powerup(struct net_device *ndev, void *priv) +{ + struct qcom_ethqos *ethqos = priv; + struct device *dev = ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + int ret; + + ret = qcom_ethqos_domain_on(ethqos, ETHQOS_PD_SERDES); + if (ret < 0) + return ret; + + return dev_pm_opp_set_level(dev, ethqos->serdes_speed); +} + +static void qcom_ethqos_pd_serdes_powerdown(struct net_device *ndev, void *priv) +{ + struct qcom_ethqos *ethqos = priv; + struct device *dev = ethqos->pd.pd_list->pd_devs[ETHQOS_PD_SERDES]; + + dev_pm_opp_set_level(dev, 0); + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_SERDES); +} + static int ethqos_clks_config(void *priv, bool enabled) { struct qcom_ethqos *ethqos = priv; @@ -749,6 +838,68 @@ static void ethqos_clks_disable(void *data) ethqos_clks_config(data, false); } +static void ethqos_disable_serdes(void *data) +{ + struct qcom_ethqos *ethqos = data; + + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_SERDES); +} + +static int ethqos_pd_clks_config(void *priv, bool enabled) +{ + struct qcom_ethqos *ethqos = priv; + int ret = 0; + + if (enabled) { + ret = qcom_ethqos_domain_on(ethqos, ETHQOS_PD_MDIO); + if (ret < 0) { + dev_err(ðqos->pdev->dev, + "Failed to enable the MDIO power domain\n"); + return ret; + } + + ethqos_set_func_clk_en(ethqos); + } else { + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_MDIO); + } + + return ret; +} + +static int qcom_ethqos_pd_init(struct device *dev, void *priv) +{ + struct qcom_ethqos *ethqos = priv; + int ret; + + /* + * Enable functional clock to prevent DMA reset after timeout due + * to no PHY clock being enabled after the hardware block has been + * power cycled. The actual configuration will be adjusted once + * ethqos_fix_mac_speed() is called. + */ + ethqos_set_func_clk_en(ethqos); + + ret = qcom_ethqos_domain_on(ethqos, ETHQOS_PD_CORE); + if (ret) + return ret; + + ret = qcom_ethqos_domain_on(ethqos, ETHQOS_PD_MDIO); + if (ret) { + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_CORE); + return ret; + } + + return 0; +} + +static void qcom_ethqos_pd_exit(struct device *dev, void *data) +{ + struct qcom_ethqos *ethqos = data; + + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_MDIO); + qcom_ethqos_domain_off(ethqos, ETHQOS_PD_CORE); +} + static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv) { struct plat_stmmacenet_data *plat_dat = priv->plat; @@ -789,8 +940,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev) "dt configuration failed\n"); } - plat_dat->clks_config = ethqos_clks_config; - ethqos = devm_kzalloc(dev, sizeof(*ethqos), GFP_KERNEL); if (!ethqos) return -ENOMEM; @@ -830,28 +979,63 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->rgmii_config_loopback_en = drv_data->rgmii_config_loopback_en; ethqos->has_emac_ge_3 = drv_data->has_emac_ge_3; ethqos->needs_sgmii_loopback = drv_data->needs_sgmii_loopback; + ethqos->serdes_speed = SPEED_1000; - ethqos->pm.link_clk = devm_clk_get(dev, clk_name); - if (IS_ERR(ethqos->pm.link_clk)) - return dev_err_probe(dev, PTR_ERR(ethqos->pm.link_clk), - "Failed to get link_clk\n"); + if (pm_data && pm_data->use_domains) { + ethqos->set_serdes_speed = ethqos_set_serdes_speed_pd; - ret = ethqos_clks_config(ethqos, true); - if (ret) - return ret; + ret = devm_pm_domain_attach_list(dev, &pm_data->pd, + ðqos->pd.pd_list); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to attach power domains\n"); - ret = devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); - if (ret) - return ret; + plat_dat->clks_config = ethqos_pd_clks_config; + plat_dat->serdes_powerup = qcom_ethqos_pd_serdes_powerup; + plat_dat->serdes_powerdown = qcom_ethqos_pd_serdes_powerdown; + plat_dat->exit = qcom_ethqos_pd_exit; + plat_dat->init = qcom_ethqos_pd_init; + plat_dat->clk_ptp_rate = pm_data->clk_ptp_rate; - ethqos->pm.serdes_phy = devm_phy_optional_get(dev, "serdes"); - if (IS_ERR(ethqos->pm.serdes_phy)) - return dev_err_probe(dev, PTR_ERR(ethqos->pm.serdes_phy), - "Failed to get serdes phy\n"); + ret = qcom_ethqos_domain_on(ethqos, ETHQOS_PD_SERDES); + if (ret) + return dev_err_probe(dev, ret, + "Failed to enable the serdes power domain\n"); + + ret = devm_add_action_or_reset(dev, ethqos_disable_serdes, ethqos); + if (ret) + return ret; + } else { + ethqos->set_serdes_speed = ethqos_set_serdes_speed_phy; + + ethqos->pm.link_clk = devm_clk_get(dev, clk_name); + if (IS_ERR(ethqos->pm.link_clk)) + return dev_err_probe(dev, PTR_ERR(ethqos->pm.link_clk), + "Failed to get link_clk\n"); + + ret = ethqos_clks_config(ethqos, true); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); + if (ret) + return ret; + + ethqos->pm.serdes_phy = devm_phy_optional_get(dev, "serdes"); + if (IS_ERR(ethqos->pm.serdes_phy)) + return dev_err_probe(dev, PTR_ERR(ethqos->pm.serdes_phy), + "Failed to get serdes phy\n"); + + ethqos_update_link_clk(ethqos, SPEED_1000); + + plat_dat->clks_config = ethqos_clks_config; + plat_dat->ptp_clk_freq_config = ethqos_ptp_clk_freq_config; + + if (ethqos->pm.serdes_phy) { + plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; + plat_dat->serdes_powerdown = qcom_ethqos_serdes_powerdown; + } + } - ethqos->set_serdes_speed = ethqos_set_serdes_speed_phy; - ethqos->serdes_speed = SPEED_1000; - ethqos_update_link_clk(ethqos, SPEED_1000); ethqos_set_func_clk_en(ethqos); plat_dat->bsp_priv = ethqos; @@ -869,11 +1053,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev) if (drv_data->dma_addr_width) plat_dat->host_dma_width = drv_data->dma_addr_width; - if (ethqos->pm.serdes_phy) { - plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; - plat_dat->serdes_powerdown = qcom_ethqos_serdes_powerdown; - } - /* Enable TSO on queue0 and enable TBS on rest of the queues */ for (i = 1; i < plat_dat->tx_queues_to_use; i++) plat_dat->tx_queues_cfg[i].tbs_en = 1; @@ -883,6 +1062,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) static const struct of_device_id qcom_ethqos_match[] = { { .compatible = "qcom,qcs404-ethqos", .data = &emac_qcs404_data}, + { .compatible = "qcom,sa8255p-ethqos", .data = &emac_sa8255p_data}, { .compatible = "qcom,sa8775p-ethqos", .data = &emac_sa8775p_data}, { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_sc8280xp_data}, { .compatible = "qcom,sm8150-ethqos", .data = &emac_sm8150_data},