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Thu, 16 Apr 2026 13:15:03 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id A6C171045A15B; Thu, 16 Apr 2026 15:15:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1776345302; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=o7thUj1C+8yEK0Fw3YtleNg2pFyzAQb0ZErKMz2sR4s=; b=DZdzRK+aWBzqVHuSkHf0vzdpywUW4rftTDE+ViV68vF28xGpUiv/BsnWo21x/4KrqgHZax bV6EEFfic4rbjK6nKfJXLoRVIl6SIiTpbUSKYrw+lpLJCy+vYfC4RAe7vNclt2FSvPAmGY Q75dQ/HEbbVWshNgBEnFUP21y7RXxwwwTgdr3JADkd77g2wpuyT+vv1CzM+Txt6o6UTtBB FBWPdGVkwBfqXbIiwgTmlG0LZ/lfKzjmzw/0QofXANzEpDSW6oFZWfVrcOsxd3PpjtnJET Z9MBZ8VR9mPk+J63LQjXdrEUaaIqDUaVsBUZQ5I+RkYUGuPvTpGqXqqNjJ350g== From: Richard Genoud To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Philipp Zabel Cc: Paul Kocialkowski , Thomas Petazzoni , John Stultz , Joao Schim , bigunclemax@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Richard Genoud Subject: [PATCH v5 3/4] arm64: dts: allwinner: h616: add PWM controller Date: Thu, 16 Apr 2026 15:14:18 +0200 Message-ID: <20260416131419.3152419-4-richard.genoud@bootlin.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260416131419.3152419-1-richard.genoud@bootlin.com> References: <20260416131419.3152419-1-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; 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R_DKIM_ALLOW(0.00)[bootlin.com:s=dkim]; DMARC_POLICY_ALLOW(0.00)[bootlin.com,reject]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; TAGGED_FROM(0.00)[bounces-22852-noreply=patchwork.local]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,pengutronix.de]; ASN(0.00)[asn:63949, ipnet:172.232.128.0/19, country:SG]; MIME_TRACE(0.00)[0:+]; RCVD_TLS_LAST(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.232.135.74:from] X-Rspamd-Queue-Id: D2A651C00F7 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The H616 has a PWM controller that can provide PWM signals, but also plain clocks. Add the PWM controller node and pins in the device tree. Tested-by: John Stultz Signed-off-by: Richard Genoud --- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 8d1110c14bad..1c7628a6e4bb 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -236,6 +236,17 @@ watchdog: watchdog@30090a0 { clocks = <&osc24M>; }; + pwm: pwm@300a000 { + compatible = "allwinner,sun50i-h616-pwm"; + reg = <0x0300a000 0x400>; + clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; + clock-names = "mod", "bus"; + resets = <&ccu RST_BUS_PWM>; + #pwm-cells = <3>; + #clock-cells = <1>; + status = "disabled"; + }; + pio: pinctrl@300b000 { compatible = "allwinner,sun50i-h616-pinctrl"; reg = <0x0300b000 0x400>; @@ -340,6 +351,42 @@ nand_rb1_pin: nand-rb1-pin { bias-pull-up; }; + /omit-if-no-ref/ + pwm0_pin: pwm0-pin { + pins = "PD28"; + function = "pwm0"; + }; + + /omit-if-no-ref/ + pwm1_pin: pwm1-pin { + pins = "PG19"; + function = "pwm1"; + }; + + /omit-if-no-ref/ + pwm2_pin: pwm2-pin { + pins = "PH2"; + function = "pwm2"; + }; + + /omit-if-no-ref/ + pwm3_pin: pwm3-pin { + pins = "PH0"; + function = "pwm3"; + }; + + /omit-if-no-ref/ + pwm4_pin: pwm4-pin { + pins = "PI14"; + function = "pwm4"; + }; + + /omit-if-no-ref/ + pwm5_pin: pwm5-pin { + pins = "PA12"; + function = "pwm5"; + }; + /omit-if-no-ref/ spi0_pins: spi0-pins { pins = "PC0", "PC2", "PC4";