From patchwork Mon Jun 22 01:36:24 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuanshen Cao X-Patchwork-Id: 2458 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id B6FAB1C0113 for ; Mon, 22 Jun 2026 03:39:27 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=gmail.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-23908-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-23908-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id DDD15302D5F4 for ; Mon, 22 Jun 2026 01:38:42 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 657401519B4; Mon, 22 Jun 2026 01:38:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ONJ1W7Zp" X-Original-To: linux-sunxi@lists.linux.dev Received: from mail-qt1-f178.google.com (mail-qt1-f178.google.com [209.85.160.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83F1625B083 for ; Mon, 22 Jun 2026 01:38:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782092322; cv=none; b=p6KfLLXiJayeNWGwkw7eFhf2OAoxEo/y5x6Qogba4eJXAGKr1J2swPZ2H1wXGzXKD8/z+y0zBu2ezp8yiDieanZt+pWoHx9u0mXIHARPTTbRJs6Q4b9SZ0UmlstLiyzDsXwD1A+Smq2g/4k17qvzx4MAjxuQ3hWO2jvel1xL3Fw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782092322; c=relaxed/simple; bh=vLXu0rOOL2UknsWMFIs4kBquQ6+QdHoeCa6lnToMFDw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c8pZ/iTxMhkLNQnw6GbmPDLvXPslUYc8J7Qcf2k2e2IlxY8y2s3uhxDRqxQ1trXieHkfF0vNEcG7cxkIdFKcVt84SCSGnqy2FU9Kw7cX6Jqz9nn0dTUIOxbRpfITdOs974xOXotOzbFH+ESuXfnnVWdJrZIf8Pqt5WrtZMXTzag= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ONJ1W7Zp; arc=none smtp.client-ip=209.85.160.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-qt1-f178.google.com with SMTP id d75a77b69052e-5176ca6bab1so45601531cf.0 for ; Sun, 21 Jun 2026 18:38:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1782092319; x=1782697119; darn=lists.linux.dev; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MHR5kuQsyq6fpq2WOE14eJR4+WEhY8nAl0AowHXE7RE=; b=ONJ1W7ZpsAa/hFw+7S26/4EXngo/AHvMNVEuFnSXrYz9EsQpiZrjEA6JC1660Sd5eR /F2q9KIQDZN+o17SCYPMNzMOz2oK7oEXQfh2J0UTN66K3nRYhwjx4Zzd61XgSmnyN2bq WpKbd9fNeuLfRGezwbkgOtXhi3TsurQhaTWf1+T9eYTJ5QUBDJUgOoyu+Dyu66S2fXDy ue8d6RmWpioIKCOPcvtYaFPZHoZ0aWy5CiSy0ROGG76Vgl695Wmf1dTiKRWxhBtSti7n M1hdOGNEIE63l6+AsGu7tEq55bwNHBgCFSHXsRueE/b3znXJCyc8VDTRivWHNrCSRmJq JFqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1782092319; x=1782697119; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=MHR5kuQsyq6fpq2WOE14eJR4+WEhY8nAl0AowHXE7RE=; b=JqimGNSnho5jeaFl2bjEoX5f8urUPWWVgDnxIIxQF+AZTlBglMPKdbxvtMu7cukR4/ 0qRWUY6New+F4CfDh0aB1VQFgv35QT0JyOPX7MgDb9oxq8Y8ba5ASclDhJKT7q0k1stw Nc3IQdNfpBFAvaVXrsh7V648jasP0h8TJJ5zAjQMlDh13lZdi5aenqM4RdMmLay51u35 OsyL9Gi+EEOunVmQKwILjjb3biGzcHdRSqL1ibNrAGPii3jnv+okcDCscM9LiGLp2EYT rKOxK7RBtbux4otTaYXCVKZi5KMru6mcmJ8jTOqg/vCpl3L7E/y2r3Vetdmj5jO/Ks2u 8THA== X-Forwarded-Encrypted: i=1; AFNElJ/wcjz359uVGwOf6Vi+E4r8ohztyFFJh13tGLbUaHn31jIAJDpXOIqr8WA7WzKjTWMR7jWW0tfmjNSJeA==@lists.linux.dev X-Gm-Message-State: AOJu0YxH0OqHUavuzmz0q+nmiTnj+9S+LVaM7SEhhWfUJfZX/9FiT+LE UtDKPPhr6W7K4dnHI9fQqk6+jkLYDJLtFTKaaLJ4cgwltmNy0/xMObtD X-Gm-Gg: AfdE7cmJLRCPLEKach0FHL37tkOD7ude7FJqoH5luuDYzIDnKNypTSOImAsEcILfOyR YAx5CUhII5+jP0Pz3de78pOIjQ1gqH605qcLJRmluHy0tky0/8UnChsZl+OHcAtgJ3H22q5lBUE +SOpfgQyK4uRgnSatMLkgGwI/El7IUiwu+TDlkrBdZRkp90JKnWLEv11/H6uRIJEe9PRGXIswvL WokVQH+JjsIHJROLI6w4YAMGTsTdD+G5soTzuBgLyAG+G84AI5G48BCNz/7yYovYoe1lWXlMscw 0abvR9GQ04SX+7PQjPZeK1QaHyni3v1L7Ug41anpj5NLe8eYHn3ABy+eFbZqXQnJlVM5pJjUiJc QFfbyPyAsVQeWimw34rTW2A7mSdEjaZJppCOmXf3+1ayRXIG32EaP/32ufWgN1RyubLl3ZmD8BA QlrYYQ2jsGU6Lxww== X-Received: by 2002:a05:622a:420b:b0:519:defb:2442 with SMTP id d75a77b69052e-519e67b8c0dmr151787251cf.17.1782092319544; Sun, 21 Jun 2026 18:38:39 -0700 (PDT) Received: from [172.17.0.2] ([138.28.231.64]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-51a098e287csm55778831cf.29.2026.06.21.18.38.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jun 2026 18:38:39 -0700 (PDT) From: Yuanshen Cao Date: Mon, 22 Jun 2026 01:36:24 +0000 Subject: [PATCH v3 2/5] dmaengine: sun6i-dma: Add set_addr function pointer for variable address widths Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260622-sun60i-a733-dma-v3-2-f697ef296cbc@gmail.com> References: <20260622-sun60i-a733-dma-v3-0-f697ef296cbc@gmail.com> In-Reply-To: <20260622-sun60i-a733-dma-v3-0-f697ef296cbc@gmail.com> To: conor+dt@kernel.org, mripard@kernel.org, krzk+dt@kernel.org, robh@kernel.org, samuel@sholland.org, wens@kernel.org, jernej.skrabec@gmail.com, Frank.Li@kernel.org, vkoul@kernel.org Cc: Yuanshen Cao , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Frank Li X-Mailer: b4 0.15.2 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The A733 DMA controller supports higher address (up to 32G) compared to previous generations. The existing `sun6i_dma_set_addr` function uses a hardcoded logic for setting the high-address bits in the LLI parameters. By moving `set_addr` into the `sun6i_dma_config` structure, we can provide specialized implementations for different hardware. This allows the A733 to use a version of `set_addr` that correctly handles its specific `SRC_HIGH_ADDR_32G` and `DST_HIGH_ADDR_32G` in the `set_addr` register later in the series. Changes: - Added `set_addr` function pointer to `struct sun6i_dma_config`. - Refactored `sun6i_dma_set_addr` and introduced `sun6i_dma_set_addr_a31/a100` (keeping the logic for previous generations). - Updated all existing configuration structs to include the new `set_addr` pointer. - Removed `has_high_addr` since the logic is replaced by `sun6i_dma_set_addr_a100`. Reviewed-by: Frank Li Signed-off-by: Yuanshen Cao --- drivers/dma/sun6i-dma.c | 35 +++++++++++++++++++++++++++++------ 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index ef3052c4ab36..9984b9033cbb 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -112,6 +112,7 @@ /* forward declaration */ struct sun6i_dma_dev; +struct sun6i_dma_lli; /* * Hardware channels / ports representation @@ -138,6 +139,8 @@ struct sun6i_dma_config { void (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst); void (*set_drq)(u32 *p_cfg, s8 src_drq, s8 dst_drq); void (*set_mode)(u32 *p_cfg, s8 src_mode, s8 dst_mode); + void (*set_addr)(struct sun6i_dma_dev *sdev, struct sun6i_dma_lli *v_lli, + dma_addr_t src, dma_addr_t dst); void (*dump_com_regs)(struct sun6i_dma_dev *sdev); u32 (*read_irq_en)(struct sun6i_dma_dev *sdev, u32 irq_reg); void (*write_irq_en)(struct sun6i_dma_dev *sdev, u32 irq_reg, u32 irq_val); @@ -147,7 +150,6 @@ struct sun6i_dma_config { u32 dst_burst_lengths; u32 src_addr_widths; u32 dst_addr_widths; - bool has_high_addr; bool has_mbus_clk; }; @@ -673,16 +675,30 @@ static int set_config(struct sun6i_dma_dev *sdev, return 0; } -static inline void sun6i_dma_set_addr(struct sun6i_dma_dev *sdev, +static void sun6i_dma_set_addr_a31(struct sun6i_dma_dev *sdev, + struct sun6i_dma_lli *v_lli, + dma_addr_t src, dma_addr_t dst) +{ + v_lli->src = lower_32_bits(src); + v_lli->dst = lower_32_bits(dst); +} + +static void sun6i_dma_set_addr_a100(struct sun6i_dma_dev *sdev, struct sun6i_dma_lli *v_lli, dma_addr_t src, dma_addr_t dst) { v_lli->src = lower_32_bits(src); v_lli->dst = lower_32_bits(dst); - if (sdev->cfg->has_high_addr) - v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | - DST_HIGH_ADDR(upper_32_bits(dst)); + v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | + DST_HIGH_ADDR(upper_32_bits(dst)); +} + +static inline void sun6i_dma_set_addr(struct sun6i_dma_dev *sdev, + struct sun6i_dma_lli *v_lli, + dma_addr_t src, dma_addr_t dst) +{ + sdev->cfg->set_addr(sdev, v_lli, src, dst); } static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( @@ -1156,6 +1172,7 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(8), .dst_burst_lengths = BIT(1) | BIT(8), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1180,6 +1197,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(8), .dst_burst_lengths = BIT(1) | BIT(8), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1199,6 +1217,7 @@ static struct sun6i_dma_config sun8i_a83t_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(8), .dst_burst_lengths = BIT(1) | BIT(8), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1225,6 +1244,7 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1247,6 +1267,7 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1269,6 +1290,7 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_h6, .set_mode = sun6i_set_mode_h6, + .set_addr = sun6i_dma_set_addr_a100, .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1279,7 +1301,6 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = { BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), - .has_high_addr = true, .has_mbus_clk = true, SUN6I_DMA_IRQ_A31_COMMON_OPS }; @@ -1293,6 +1314,7 @@ static struct sun6i_dma_config sun50i_h6_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_h6, .set_mode = sun6i_set_mode_h6, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | @@ -1320,6 +1342,7 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr_a31, .src_burst_lengths = BIT(1) | BIT(8), .dst_burst_lengths = BIT(1) | BIT(8), .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |