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Sun, 6 Sep 2026 00:07:32 -0700 (PDT) From: Junhui Liu Date: Sun, 06 Sep 2026 15:06:41 +0800 Subject: [PATCH 4/4] clk: sunxi-ng: sun55i-a523-r-ccu: Use P-only clocks for timers Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260906-sunxi-clk-no-p-v1-4-cbde21c9fe69@pigmoral.tech> References: <20260906-sunxi-clk-no-p-v1-0-cbde21c9fe69@pigmoral.tech> In-Reply-To: <20260906-sunxi-clk-no-p-v1-0-cbde21c9fe69@pigmoral.tech> To: Stephen Boyd , Brian Masney , Jerome Brunet , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Andre Przywara Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Junhui Liu X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2310; i=junhui.liu@pigmoral.tech; h=from:subject:message-id; bh=w/ethCL/2gAqTdxAZVO9TFIwPKiMkbxjk7GgSv1iGNo=; b=owGbwMvMwCWWvDb1VEXc8j+Mp9WSGLLmCgodfq0cfVtu8Qldz1kHfqtEZVZeNdw5wy5N/lDLm 72Kq8N4O0pZGMS4GGTFFFm4/MX/WevwfDsi0HofZg4rE8gQBi5OAZgIy35GhnXZRdctn7UwfO3f sv952nKVmq3ya52S30aL3Pq/h1fx91FGhgmPahacb/e4znI4Lqo4ZrtYdWHCJEuBM+uyXl3ouWP 4lAkA X-Developer-Key: i=junhui.liu@pigmoral.tech; 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MID_RHS_MATCH_FROM(0.00)[]; FROM_NEQ_ENVFROM(0.00)[junhui.liu@pigmoral.tech,linux-sunxi@lists.linux.dev]; RCVD_TLS_LAST(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; TAGGED_FROM(0.00)[bounces-25634-noreply=patchwork.local]; TO_DN_SOME(0.00)[] X-Rspamd-Queue-Id: B9C521C075F X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The R timer clocks only have a P divider, but are currently modeled as MP clocks with a zero-width M divider. ccu_mp_set_rate() generates an invalid mask for the zero-width M divider, clearing unrelated register fields. Model these clocks as P-only clocks to avoid accessing a nonexistent M divider. Fixes: 8cea339cfb81 ("clk: sunxi-ng: add support for the A523/T527 PRCM CCU") Signed-off-by: Junhui Liu --- drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c | 37 +++++++++++++++----------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c index db0e36d8838e..349230e28c1c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c @@ -43,27 +43,24 @@ static SUNXI_CCU_M_DATA_WITH_MUX(r_apb1_clk, "r-apb1", 24, 3, /* mux */ 0); -static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(r_cpu_timer0, "r-timer0", - r_ahb_apb_parents, 0x100, - 0, 0, /* no M */ - 1, 3, /* P */ - 4, 3, /* mux */ - BIT(0), +static SUNXI_CCU_P_DATA_WITH_MUX_GATE(r_cpu_timer0, "r-timer0", + r_ahb_apb_parents, 0x100, + 1, 3, /* P */ + 4, 3, /* mux */ + BIT(0), + 0); +static SUNXI_CCU_P_DATA_WITH_MUX_GATE(r_cpu_timer1, "r-timer1", + r_ahb_apb_parents, 0x104, + 1, 3, /* P */ + 4, 3, /* mux */ + BIT(0), + 0); +static SUNXI_CCU_P_DATA_WITH_MUX_GATE(r_cpu_timer2, "r-timer2", + r_ahb_apb_parents, 0x108, + 1, 3, /* P */ + 4, 3, /* mux */ + BIT(0), 0); -static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(r_cpu_timer1, "r-timer1", - r_ahb_apb_parents, 0x104, - 0, 0, /* no M */ - 1, 3, /* P */ - 4, 3, /* mux */ - BIT(0), - 0); -static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(r_cpu_timer2, "r-timer2", - r_ahb_apb_parents, 0x108, - 0, 0, /* no M */ - 1, 3, /* P */ - 4, 3, /* mux */ - BIT(0), - 0); static SUNXI_CCU_GATE_HW(bus_r_timer_clk, "bus-r-timer", &r_ahb_clk.common.hw, 0x11c, BIT(0), 0);