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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fe5b44db6sm14839105e9.0.2026.09.23.13.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 13:47:49 -0700 (PDT) From: Jerome Brunet Date: Wed, 23 Sep 2026 22:47:35 +0200 Subject: [PATCH net-next v3 5/5] net: stmmac: sun55i: Add support for Allwinner A733 GMAC210 Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260923-allwinner-a733-gmac-support-v3-5-15735155a789@baylibre.com> References: <20260923-allwinner-a733-gmac-support-v3-0-15735155a789@baylibre.com> In-Reply-To: <20260923-allwinner-a733-gmac-support-v3-0-15735155a789@baylibre.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Richard Cochran , Maxime Ripard , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Maxime Chevallier Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Andre Przywara , Jerome Brunet X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4132; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=sjLoecwDQJXaWVmzvGOQ+F7IRuyAd48CcawjSycmYoQ=; b=owGbwMvMwCW2VtK+WnvWU3HG02pJDFlbrN669B39qPeAbW7OgdsplxQT71j87Zx16uqMiimtn Lp1lh6lHaUsDGJcDLJiiiw13NXi7yS1vsyarnMbZg4rE8gQBi5OAZiIihkjwyb31d8uyoQbH75s 9sfsjf4n69Uei5jkzL5psmk98r3+tIrhv7f6q8R7G+4cYbbpqebm5Ntqsd2bf3uH2dmQ2SHdm9s c+AA= X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The A733 GMAC210 is a DesignWare MAC 5.20 using an Allwinner glue close to the A523 GMAC200 already supported by this driver, with the following differences to handle: * The glue configuration registers are a dedicated MMIO region of the controller instead of a syscon register. This region is in the AHB reset domain, so the glue driver releases the shared AHB reset before writing the configuration. * The TX clock delay value is 5 bits wide, split over 2 register fields. Both TX and RX delays use a 180ps step. * The DMA channels have their own interrupt lines, so the per-DMA-channel interrupt mode is enabled, as the vendor SDK does. * TX LPI clock gating is supported, as the vendor SDK indicates. Follow the PHY capability with STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP rather than forcing it on with the deprecated 'snps,en-tx-lpi-clockgating' DT property. Signed-off-by: Jerome Brunet --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c | 53 +++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c index 49abbb248b61..675b83cd52c8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "stmmac.h" @@ -65,6 +66,41 @@ static int sun55i_gmac200_init_resources(struct platform_device *pdev, return 0; } +static const struct regmap_config sun60i_a733_regmap_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, +}; + +static int sun60i_gmac210_init_resources(struct platform_device *pdev, + struct sun55i_gmac *gmac) +{ + struct device *dev = &pdev->dev; + struct reset_control *ahb_reset; + void __iomem *base; + + /* + * Get the configuration region out of reset before changing it. + * stmmac core holds the same shared reset but only deasserts it later. + */ + ahb_reset = devm_reset_control_get_shared_deasserted(dev, "ahb"); + if (IS_ERR(ahb_reset)) + return dev_err_probe(dev, PTR_ERR(ahb_reset), + "Failed to get ahb reset\n"); + + base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(base)) + return dev_err_probe(dev, PTR_ERR(base), + "Unable to get config memory region\n"); + + gmac->regmap = devm_regmap_init_mmio(dev, base, &sun60i_a733_regmap_cfg); + if (IS_ERR(gmac->regmap)) + return dev_err_probe(dev, PTR_ERR(gmac->regmap), + "Unable to get regmap for config memory region\n"); + + return 0; +} + static int sun55i_gmac200_validate_delay(struct device *dev, const char *dir, u32 *val, u32 step, u32 max) { @@ -132,9 +168,11 @@ static int sun55i_gmac200_setup(struct device *dev, phy_modes(plat->phy_interface)); } + /* The dwmac will sample this when stmmaceth reset is deasserted */ ret = regmap_write(gmac->regmap, gmac->data->offset, reg); if (ret < 0) - return dev_err_probe(dev, ret, "Failed to write to syscon\n"); + return dev_err_probe(dev, ret, + "Failed to write glue configuration\n"); return 0; } @@ -202,9 +240,22 @@ static const struct sun55i_gmac_data sun55i_a523_gmac200_data = { .rxdly_step_ps = 100, }; +static const struct sun55i_gmac_data sun60i_a733_gmac210_data = { + .init_resources = sun60i_gmac210_init_resources, + .flags = (STMMAC_FLAG_SPH_DISABLE | + STMMAC_FLAG_MULTI_MSI_EN | + STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP), + .offset = 0x0, + .etxdc_ext_mask = GENMASK(17, 16), + .txdly_step_ps = 180, + .rxdly_step_ps = 180, +}; + static const struct of_device_id sun55i_gmac200_match[] = { { .compatible = "allwinner,sun55i-a523-gmac200", .data = &sun55i_a523_gmac200_data }, + { .compatible = "allwinner,sun60i-a733-gmac210", + .data = &sun60i_a733_gmac210_data }, { } }; MODULE_DEVICE_TABLE(of, sun55i_gmac200_match);