diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 48c52eb9623356b12b39e5c0105d745e237007d6..af7acfc7a26fa4f00bad0901b9fb91d9ce532854 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -347,13 +347,13 @@ static void sun8i_dwmac_dump_mac_regs(struct mac_device_info *hw, static void sun8i_dwmac_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, - bool rx, bool tx) + u32 flags) { u32 value = readl(ioaddr + EMAC_INT_EN); - if (rx) + if (flags & STMMAC_DMA_IRQ_RX) value |= EMAC_RX_INT; - if (tx) + if (flags & STMMAC_DMA_IRQ_TX) value |= EMAC_TX_INT; writel(value, ioaddr + EMAC_INT_EN); @@ -361,13 +361,13 @@ static void sun8i_dwmac_enable_dma_irq(struct stmmac_priv *priv, static void sun8i_dwmac_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, - bool rx, bool tx) + u32 flags) { u32 value = readl(ioaddr + EMAC_INT_EN); - if (rx) + if (flags & STMMAC_DMA_IRQ_RX) value &= ~EMAC_RX_INT; - if (tx) + if (flags & STMMAC_DMA_IRQ_TX) value &= ~EMAC_TX_INT; writel(value, ioaddr + EMAC_INT_EN); diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h index 43b036d4e95bdde882ab79e57e7cf6e0b9cb2e39..ca8caade68079252de0d2c4805387f8e07a56f22 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h @@ -175,9 +175,9 @@ static inline u32 dma_chanx_base_addr(const struct dwmac4_addrs *addrs, int dwmac4_dma_reset(void __iomem *ioaddr); void dwmac4_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void dwmac4_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void dwmac4_dma_start_tx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan); void dwmac4_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr, diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c index a0249715fafafdf8c93d1535a15b73daed1168cb..7c5881ca61e8bb586b6d6f791a3fb1c122c814bb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c @@ -109,30 +109,39 @@ void dwmac4_set_rx_ring_len(struct stmmac_priv *priv, void __iomem *ioaddr, writel(len, ioaddr + DMA_CHAN_RX_RING_LEN(dwmac4_addrs, chan)); } +static u32 dwmac4_enable_dma_mask(u32 group) +{ + u32 mask = 0; + + if (group & STMMAC_DMA_IRQ_RX) + mask |= DMA_CHAN_INTR_ENA_RIE; + if (group & STMMAC_DMA_IRQ_TX) + mask |= DMA_CHAN_INTR_ENA_TIE; + if (group & STMMAC_DMA_IRQ_OTHER) + mask |= DMA_CHAN_INTR_DEFAULT_MASK & + ~(DMA_CHAN_INTR_ENA_RIE | DMA_CHAN_INTR_ENA_TIE); + + return mask; +} + void dwmac4_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx) + u32 chan, u32 group) { const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs; u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan)); - if (rx) - value |= DMA_CHAN_INTR_ENA_RIE; - if (tx) - value |= DMA_CHAN_INTR_ENA_TIE; + value |= dwmac4_enable_dma_mask(group); writel(value, ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan)); } void dwmac4_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx) + u32 chan, u32 group) { const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs; u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan)); - if (rx) - value &= ~DMA_CHAN_INTR_ENA_RIE; - if (tx) - value &= ~DMA_CHAN_INTR_ENA_TIE; + value &= ~dwmac4_enable_dma_mask(group); writel(value, ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan)); } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h index e1c37ac2c99d2ff5be3aa64cab4812821ec60e91..6b4cad57610ca7f391a9baa0871ef7060df29896 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h @@ -145,9 +145,9 @@ static inline u32 dma_chan_base_addr(u32 base, u32 chan) void dwmac_enable_dma_transmission(void __iomem *ioaddr, u32 chan); void dwmac_enable_dma_reception(void __iomem *ioaddr, u32 chan); void dwmac_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void dwmac_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void dwmac_dma_start_tx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan); void dwmac_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr, diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c index a0383f9486c2db08bff5a62006857c335721966a..d7465271985466c6cbd867c35ebc57a661fce64b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -38,28 +38,37 @@ void dwmac_enable_dma_reception(void __iomem *ioaddr, u32 chan) writel(1, ioaddr + DMA_CHAN_RCV_POLL_DEMAND(chan)); } +static u32 dwmac_enable_dma_mask(u32 group) +{ + u32 mask = 0; + + if (group & STMMAC_DMA_IRQ_RX) + mask |= DMA_INTR_DEFAULT_RX; + if (group & STMMAC_DMA_IRQ_TX) + mask |= DMA_INTR_DEFAULT_TX; + if (group & STMMAC_DMA_IRQ_OTHER) + mask |= DMA_INTR_DEFAULT_MASK & + ~(DMA_INTR_DEFAULT_RX | DMA_INTR_DEFAULT_TX); + + return mask; +} + void dwmac_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx) + u32 chan, u32 group) { u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); - if (rx) - value |= DMA_INTR_DEFAULT_RX; - if (tx) - value |= DMA_INTR_DEFAULT_TX; + value |= dwmac_enable_dma_mask(group); writel(value, ioaddr + DMA_CHAN_INTR_ENA(chan)); } void dwmac_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx) + u32 chan, u32 group) { u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); - if (rx) - value &= ~DMA_INTR_DEFAULT_RX; - if (tx) - value &= ~DMA_INTR_DEFAULT_TX; + value &= ~dwmac_enable_dma_mask(group); writel(value, ioaddr + DMA_CHAN_INTR_ENA(chan)); } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index ff83858ebc1f33aa8092a2d83018bd5f96b7eead..63459d1a73a95b4fecedc39dbcde31c21a87dc47 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -228,30 +228,39 @@ static void dwxgmac2_dma_tx_mode(struct stmmac_priv *priv, void __iomem *ioaddr, writel(value, ioaddr + XGMAC_MTL_TXQ_OPMODE(channel)); } +static u32 dwxgmac2_enable_dma_mask(u32 group) +{ + u32 mask = 0; + + if (group & STMMAC_DMA_IRQ_RX) + mask |= XGMAC_DMA_INT_DEFAULT_RX; + if (group & STMMAC_DMA_IRQ_TX) + mask |= XGMAC_DMA_INT_DEFAULT_TX; + if (group & STMMAC_DMA_IRQ_OTHER) + mask |= XGMAC_DMA_INT_DEFAULT_EN & + ~(XGMAC_DMA_INT_DEFAULT_RX | XGMAC_DMA_INT_DEFAULT_TX); + + return mask; +} + static void dwxgmac2_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, - bool rx, bool tx) + u32 group) { u32 value = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan)); - if (rx) - value |= XGMAC_DMA_INT_DEFAULT_RX; - if (tx) - value |= XGMAC_DMA_INT_DEFAULT_TX; + value |= dwxgmac2_enable_dma_mask(group); writel(value, ioaddr + XGMAC_DMA_CH_INT_EN(chan)); } static void dwxgmac2_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, - bool rx, bool tx) + u32 group) { u32 value = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan)); - if (rx) - value &= ~XGMAC_DMA_INT_DEFAULT_RX; - if (tx) - value &= ~XGMAC_DMA_INT_DEFAULT_TX; + value &= ~dwxgmac2_enable_dma_mask(group); writel(value, ioaddr + XGMAC_DMA_CH_INT_EN(chan)); } diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 5e2654c91b4171da0e6143671dade4d62c750e2f..766a36e4fab6619a031e0baeae965f3794b1cbe1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -163,6 +163,12 @@ struct stmmac_desc_ops { struct stmmac_dma_cfg; struct dma_features; +#define STMMAC_DMA_IRQ_RX BIT(0) +#define STMMAC_DMA_IRQ_TX BIT(1) +#define STMMAC_DMA_IRQ_OTHER BIT(2) +#define STMMAC_DMA_IRQ_TXRX (STMMAC_DMA_IRQ_TX | STMMAC_DMA_IRQ_RX) +#define STMMAC_DMA_IRQ_ALL (STMMAC_DMA_IRQ_TXRX | STMMAC_DMA_IRQ_OTHER) + /* Specific DMA helpers */ struct stmmac_dma_ops { /* DMA core initialization */ @@ -194,9 +200,9 @@ struct stmmac_dma_ops { void (*enable_dma_transmission)(void __iomem *ioaddr, u32 chan); void (*enable_dma_reception)(void __iomem *ioaddr, u32 chan); void (*enable_dma_irq)(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void (*disable_dma_irq)(struct stmmac_priv *priv, void __iomem *ioaddr, - u32 chan, bool rx, bool tx); + u32 chan, u32 group); void (*start_tx)(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan); void (*stop_tx)(struct stmmac_priv *priv, void __iomem *ioaddr, diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b837e8e27a352e15c0967cc12773fe18a100a2a5..7b80fe66cf199adbd31b79a484b2970aef211b51 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -2515,7 +2515,7 @@ static void stmmac_enable_all_dma_irq(struct stmmac_priv *priv) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_enable_dma_irq(priv, priv->ioaddr, chan, 1, 1); + stmmac_enable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_ALL); spin_unlock_irqrestore(&ch->lock, flags); } } @@ -3088,7 +3088,7 @@ static int stmmac_napi_check(struct stmmac_priv *priv, u32 chan, u32 dir) if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) { if (napi_schedule_prep(rx_napi)) { spin_lock_irqsave(&ch->lock, flags); - stmmac_disable_dma_irq(priv, priv->ioaddr, chan, 1, 0); + stmmac_disable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_RX); spin_unlock_irqrestore(&ch->lock, flags); __napi_schedule(rx_napi); } @@ -3097,7 +3097,7 @@ static int stmmac_napi_check(struct stmmac_priv *priv, u32 chan, u32 dir) if ((status & handle_tx) && (chan < priv->plat->tx_queues_to_use)) { if (napi_schedule_prep(tx_napi)) { spin_lock_irqsave(&ch->lock, flags); - stmmac_disable_dma_irq(priv, priv->ioaddr, chan, 0, 1); + stmmac_disable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_TX); spin_unlock_irqrestore(&ch->lock, flags); __napi_schedule(tx_napi); } @@ -3291,7 +3291,7 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) /* DMA CSR Channel configuration */ for (chan = 0; chan < dma_csr_ch; chan++) { stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan); - stmmac_disable_dma_irq(priv, priv->ioaddr, chan, 1, 1); + stmmac_disable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_TXRX); } /* DMA RX Channel Configuration */ @@ -3365,7 +3365,7 @@ static enum hrtimer_restart stmmac_tx_timer(struct hrtimer *t) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_disable_dma_irq(priv, priv->ioaddr, ch->index, 0, 1); + stmmac_disable_dma_irq(priv, priv->ioaddr, ch->index, STMMAC_DMA_IRQ_TX); spin_unlock_irqrestore(&ch->lock, flags); __napi_schedule(napi); } @@ -6013,7 +6013,7 @@ static int stmmac_napi_poll_rx(struct napi_struct *napi, int budget) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_enable_dma_irq(priv, priv->ioaddr, chan, 1, 0); + stmmac_enable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_RX); spin_unlock_irqrestore(&ch->lock, flags); } @@ -6042,7 +6042,7 @@ static int stmmac_napi_poll_tx(struct napi_struct *napi, int budget) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_enable_dma_irq(priv, priv->ioaddr, chan, 0, 1); + stmmac_enable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_TX); spin_unlock_irqrestore(&ch->lock, flags); } @@ -6095,7 +6095,7 @@ static int stmmac_napi_poll_rxtx(struct napi_struct *napi, int budget) /* Both RX and TX work done are complete, * so enable both RX & TX IRQs. */ - stmmac_enable_dma_irq(priv, priv->ioaddr, chan, 1, 1); + stmmac_enable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_TXRX); spin_unlock_irqrestore(&ch->lock, flags); } @@ -7032,7 +7032,7 @@ void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_disable_dma_irq(priv, priv->ioaddr, queue, 1, 0); + stmmac_disable_dma_irq(priv, priv->ioaddr, queue, STMMAC_DMA_IRQ_RX); spin_unlock_irqrestore(&ch->lock, flags); stmmac_stop_rx_dma(priv, queue); @@ -7072,7 +7072,7 @@ void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue) stmmac_start_rx_dma(priv, queue); spin_lock_irqsave(&ch->lock, flags); - stmmac_enable_dma_irq(priv, priv->ioaddr, queue, 1, 0); + stmmac_enable_dma_irq(priv, priv->ioaddr, queue, STMMAC_DMA_IRQ_RX); spin_unlock_irqrestore(&ch->lock, flags); } @@ -7082,7 +7082,7 @@ void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue) unsigned long flags; spin_lock_irqsave(&ch->lock, flags); - stmmac_disable_dma_irq(priv, priv->ioaddr, queue, 0, 1); + stmmac_disable_dma_irq(priv, priv->ioaddr, queue, STMMAC_DMA_IRQ_TX); spin_unlock_irqrestore(&ch->lock, flags); stmmac_stop_tx_dma(priv, queue); @@ -7123,7 +7123,7 @@ void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue) stmmac_start_tx_dma(priv, queue); spin_lock_irqsave(&ch->lock, flags); - stmmac_enable_dma_irq(priv, priv->ioaddr, queue, 0, 1); + stmmac_enable_dma_irq(priv, priv->ioaddr, queue, STMMAC_DMA_IRQ_TX); spin_unlock_irqrestore(&ch->lock, flags); } @@ -7191,7 +7191,7 @@ int stmmac_xdp_open(struct net_device *dev) /* DMA CSR Channel configuration */ for (chan = 0; chan < dma_csr_ch; chan++) { stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan); - stmmac_disable_dma_irq(priv, priv->ioaddr, chan, 1, 1); + stmmac_disable_dma_irq(priv, priv->ioaddr, chan, STMMAC_DMA_IRQ_TXRX); } /* Adjust Split header */