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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a843225d69sm284345fac.15.2026.10.23.16.38.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 16:38:41 -0700 (PDT) From: James Hilliard Date: Fri, 23 Oct 2026 17:38:26 -0600 Subject: [PATCH v3 7/9] dmaengine: sun6i: track paused virtual channels X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-7-ef1acb0be768@gmail.com> References: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-0-ef1acb0be768@gmail.com> In-Reply-To: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-0-ef1acb0be768@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.19 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; RCVD_COUNT_FIVE(0.00)[6]; FROM_HAS_DN(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com]; TAGGED_RCPT(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:helo,sea.lore.kernel.org:rdns]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26844-noreply=patchwork.local]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10]; TO_DN_SOME(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.234.253.10:from]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.77.114.92:received,209.85.160.54:received]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; MIME_TRACE(0.00)[0:+]; MID_RHS_MATCH_FROM(0.00)[]; RECEIVED_SPAMHAUS_PBL(0.00)[174.29.1.49:received]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; RCVD_TLS_LAST(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: 200A61C010E X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= sun6i_dma_tx_status() only returns the cookie state, so a paused but incomplete transfer is reported as DMA_IN_PROGRESS. The 8250 RX flush path pauses the channel and calls its completion helper before terminating it. That helper ignores an in-progress transfer to avoid consuming a new RX operation. With sun6i it consequently drops the partial buffer and leaves rx_running set, preventing another receive from being submitted. Track pause state under the channel-assignment lock and report DMA_PAUSED for incomplete cookies, including status queries without a residue output. Flush the hardware pause request before returning. Completed cookies remain DMA_COMPLETE. Keep paused channels out of the pending queue and do not start a queued descriptor when a paused channel's previous descriptor completes. Release the completed physical channel so other virtual channels can use it, and clear its hardware pause request before reassignment. The paused virtual channel retains its queued descriptors until resume. Resume requeues an unassigned channel only once and schedules the allocator, so an idle controller does not require an unrelated completion to resume it. Clear the pause state when terminating the channel. Fixes: 555859308723 ("dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller") Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index dab17b3863fc..25987f550707 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -208,6 +208,7 @@ struct sun6i_vchan { u8 port; u8 irq_type; bool cyclic; + bool paused; }; struct sun6i_dma_dev { @@ -537,13 +538,17 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) pchan = vchan->phy; if (pchan && !pchan->desc) { - if (sun6i_dma_start_desc(vchan)) { + if (vchan->paused || sun6i_dma_start_desc(vchan)) { /* * No current txd associated with this channel */ dev_dbg(sdev->slave.dev, "pchan %u: free\n", pchan->idx); + /* The next owner must not inherit the pause request. */ + writel(DMA_CHAN_PAUSE_RESUME, + pchan->base + DMA_CHAN_PAUSE); + /* Mark this channel free */ vchan->phy = NULL; pchan->vchan = NULL; @@ -935,10 +940,12 @@ static int sun6i_dma_pause(struct dma_chan *chan) dev_dbg(dmaengine_chan_dev(chan), "vchan %p: pause\n", &vchan->vc); spin_lock_irqsave(&sdev->lock, flags); + vchan->paused = true; pchan = vchan->phy; if (pchan) { writel(DMA_CHAN_PAUSE_PAUSE, pchan->base + DMA_CHAN_PAUSE); + readl(pchan->base + DMA_CHAN_PAUSE); } else { list_del_init(&vchan->node); } @@ -960,12 +967,14 @@ static int sun6i_dma_resume(struct dma_chan *chan) spin_lock(&vchan->vc.lock); pchan = vchan->phy; + vchan->paused = false; if (pchan) { writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); - } else if (!list_empty(&vchan->vc.desc_issued)) { + } else if (!list_empty(&vchan->vc.desc_issued) && list_empty(&vchan->node)) { list_add_tail(&vchan->node, &sdev->pending); } + tasklet_schedule(&sdev->task); spin_unlock(&vchan->vc.lock); spin_unlock_irqrestore(&sdev->lock, flags); @@ -994,6 +1003,7 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) } vchan->cyclic = false; + vchan->paused = false; vchan_get_all_descriptors(&vchan->vc, &head); if (pchan) { @@ -1040,6 +1050,8 @@ static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan, spin_lock_irqsave(&sdev->lock, flags); spin_lock(&vchan->vc.lock); ret = dma_cookie_status(chan, cookie, state); + if (ret == DMA_IN_PROGRESS && vchan->paused) + ret = DMA_PAUSED; if (ret == DMA_COMPLETE || !state) goto out; pchan = vchan->phy; @@ -1074,7 +1086,7 @@ static void sun6i_dma_issue_pending(struct dma_chan *chan) spin_lock(&vchan->vc.lock); if (vchan_issue_pending(&vchan->vc)) { - if (!vchan->phy && list_empty(&vchan->node)) { + if (!vchan->paused && !vchan->phy && list_empty(&vchan->node)) { list_add_tail(&vchan->node, &sdev->pending); tasklet_schedule(&sdev->task); dev_dbg(dmaengine_chan_dev(chan), "vchan %p: issued\n",