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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a843225d69sm284345fac.15.2026.10.23.16.38.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 16:38:45 -0700 (PDT) From: James Hilliard Date: Fri, 23 Oct 2026 17:38:28 -0600 Subject: [PATCH v3 9/9] dmaengine: sun6i: keep cyclic state with the prepared descriptor X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-9-ef1acb0be768@gmail.com> References: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-0-ef1acb0be768@gmail.com> In-Reply-To: <20261023-submit-sun6i-dma-lifetime-next-v1-v3-0-ef1acb0be768@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [4.31 / 15.00]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:helo,sea.lore.kernel.org:rdns]; FROM_HAS_DN(0.00)[]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; TAGGED_RCPT(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26845-noreply=patchwork.local]; TO_DN_SOME(0.00)[]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10:c]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[209.85.160.47:received,100.77.114.92:received]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.234.253.10:from]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; RECEIVED_SPAMHAUS_PBL(0.00)[174.29.1.49:received]; MID_RHS_MATCH_FROM(0.00)[]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: 67ED41C010E X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= Preparing a cyclic transfer sets vchan->cyclic before the descriptor is submitted. A finite transfer on that channel can then select package interrupts and take the cyclic callback path instead of completing its cookie. Merely preparing an unrelated future transfer must not change the active transfer or the meaning of queued descriptors. Store the flag in sun6i_desc and consult the active descriptor when selecting interrupts, completing a transfer and terminating it. Finite descriptors retain their zero-initialized flag. This also makes callback retirement depend on the descriptor whose lifetime is being ended. The shared state was identified during the H616 cyclic UART RX review. Fixes: a90e173f3faf ("dmaengine: sun6i: Add cyclic capability") Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index b83138745bd1..2152979f72f2 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -191,6 +191,7 @@ struct sun6i_desc { struct virt_dma_desc vd; dma_addr_t p_lli; struct sun6i_dma_lli *v_lli; + bool cyclic; }; struct sun6i_pchan { @@ -207,7 +208,6 @@ struct sun6i_vchan { struct sun6i_pchan *phy; u8 port; u8 irq_type; - bool cyclic; bool paused; }; @@ -507,7 +507,7 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vchan) (DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << (irq_offset * DMA_IRQ_CHAN_WIDTH)); - vchan->irq_type = vchan->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; + vchan->irq_type = pchan->desc->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; irq_val = sun6i_read_irq_en(sdev, irq_reg); irq_val &= ~((DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << @@ -610,7 +610,7 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) desc = pchan->desc; if (vchan && desc && (status & vchan->irq_type)) { spin_lock(&vchan->vc.lock); - if (vchan->cyclic) { + if (desc->cyclic) { vchan_cyclic_callback(&desc->vd); } else { /* Completion transfers ownership to virt-dma. */ @@ -911,7 +911,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic( prev->p_lli_next = txd->p_lli; /* cyclic list */ - vchan->cyclic = true; + txd->cyclic = true; return vchan_tx_prep(&vchan->vc, &txd->vd, flags); @@ -1000,13 +1000,12 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) struct virt_dma_desc *vd = &pchan->desc->vd; /* A cyclic callback may still hold this descriptor outside vc.lock. */ - if (vchan->cyclic) + if (pchan->desc->cyclic) vchan_terminate_vdesc(vd); else list_add_tail(&vd->node, &head); } - vchan->cyclic = false; vchan->paused = false; /* Leave terminated cyclic descriptors for the sleepable synchronize. */ list_splice_tail_init(&vchan->vc.desc_allocated, &head);