From patchwork Fri Aug 21 08:53:37 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 3025 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 029091C0130 for ; Fri, 21 Aug 2026 11:14:34 +0200 (CEST) Authentication-Results: mxe881; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-25271-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-25271-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id B6AA5329040E for ; Fri, 21 Aug 2026 09:02:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3EC36466B1A; Fri, 21 Aug 2026 09:01:25 +0000 (UTC) X-Original-To: linux-sunxi@lists.linux.dev Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C4BB4582D9; Fri, 21 Aug 2026 09:01:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787302885; cv=none; b=BA8tKq/b4t3M+6KJx1ywR4rqXYaV1OoSmWTMRuBNNQao8HJbcQNGTYVRylFYYq3uJrXfkeBa3ycGE/sXRwRFZB/n35fQjaf0g4C66lOURbBwYIJrK9WOV3ThTZBKnNkm91SyLd6RP/7i0QYAq9f/R94ar957i2Xa+fzavMJmHLI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787302885; c=relaxed/simple; bh=B6p+OcFdP515S8LjF8ohzfroFcUB/LLJnrQ8WbhYQ7s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o+XrWFlgCVMcUvMzRTMPNtfnpx7V+CATQSlTAeYxPcEw8BrQhfTfpDcMiuCw+oLyX0m2YBakAmcYfdLtdpIIgwvFzDvbS06qPyNQ53NzOkEf5jvmSF3LgNN+pKwURrQkVLQd/htRvfAu0VLTWM0ImfYMkUd8lxLnZT2kPWLGWTo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id D868B1F00A3A; Fri, 21 Aug 2026 09:00:58 +0000 (UTC) From: Geert Uytterhoeven To: Ryan Chen , Joel Stanley , Stephen Boyd , Brian Masney , Jerome Brunet , Andrew Jeffery , Billy Tsai , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Ray Jui , Scott Branden , Broadcom internal kernel review list , Taichi Sugaya , Takao Orito , Linus Walleij , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Sudeep Holla , Cristian Marussi , David Lechner , Abel Vesa , Peng Fan , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Paul Cercueil , Santosh Shilimkar , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Vladimir Zapolskiy , Heiko Stuebner , Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Peter Griffin , Alim Akhtar , Dinh Nguyen , Viresh Kumar , Maxime Coquelin , Alexandre Torgue , =?utf-8?q?Emilio_L=C3=B3pe?= =?utf-8?q?z?= , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu , Ulf Hansson , Liviu Dudau , Lorenzo Pieralisi , Michal Simek , Matthias Brugger Cc: linux-clk@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, arm-scmi@vger.kernel.org, imx@lists.linux.dev, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-samsung-soc@vger.kernel.org, soc@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 27/45] clk: renesas: Make sure clk_init_data is fully initialized Date: Fri, 21 Aug 2026 10:53:37 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The clk_init_data structure contains several mutually-exclusive members for different methods to specify the possible parents of a clock, prompting drivers to initialize only the members they need. However, not initializing all members may cause subtle issues, which are only exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is enabled. Make sure all members are fully initialized, to avoid such bugs, and to prevent future breakage when converting drivers to a different method for specifying the parents. Signed-off-by: Geert Uytterhoeven --- Boot-tested on RZ/Five. --- drivers/clk/renesas/rzg2l-cpg.c | 18 +++++++++--------- drivers/clk/renesas/rzv2h-cpg.c | 8 ++++---- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index 88d74858687d4866..50b64eb3eafebe71 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -580,7 +580,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { struct sd_mux_hw_data *sd_mux_hw_data; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *clk_hw; int ret; @@ -831,9 +831,9 @@ rzg2l_cpg_dsi_div_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { struct dsi_div_hw_data *clk_hw_data; + struct clk_init_data init = {}; const struct clk *parent; const char *parent_name; - struct clk_init_data init; struct clk_hw *clk_hw; int ret; @@ -916,8 +916,8 @@ static struct clk * __init rzg3l_cpg_lvds_div_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { + struct clk_init_data init = {}; struct clk_fixed_factor *ff; - struct clk_init_data init; const struct clk *parent; const char *parent_name; int ret; @@ -1031,9 +1031,9 @@ rzg3l_cpg_dsi_div_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { struct g3l_dsi_div_hw_data *clk_hw_data; + struct clk_init_data init = {}; const struct clk *parent; const char *parent_name; - struct clk_init_data init; struct clk_hw *clk_hw; int ret; @@ -1128,7 +1128,7 @@ rzg2l_cpg_pll5_4_mux_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { struct pll5_mux_hw_data *clk_hw_data; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *clk_hw; int ret; @@ -1255,8 +1255,8 @@ static struct clk * __init rzg2l_cpg_sipll5_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { + struct clk_init_data init = {}; const struct clk *parent; - struct clk_init_data init; const char *parent_name; struct sipll5 *sipll5; struct clk_hw *clk_hw; @@ -1381,9 +1381,9 @@ rzg2l_cpg_pll_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv, const struct clk_ops *ops) { + struct clk_init_data init = {}; struct device *dev = priv->dev; const struct clk *parent; - struct clk_init_data init; const char *parent_name; struct pll_clk *pll_clk; int ret; @@ -1525,8 +1525,8 @@ static struct clk * __init rzg3l_cpg_dsi_mux_clk_register(const struct cpg_core_clk *core, struct rzg2l_cpg_priv *priv) { + struct clk_init_data init = {}; struct clk_mux *mux_data; - struct clk_init_data init; int ret; mux_data = devm_kzalloc(priv->dev, sizeof(*mux_data), GFP_KERNEL); @@ -2265,10 +2265,10 @@ rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod, const struct rzg2l_cpg_info *info, struct rzg2l_cpg_priv *priv) { + struct clk_init_data init = {}; struct mod_clock *clock = NULL; struct device *dev = priv->dev; unsigned int id = mod->id; - struct clk_init_data init; struct clk *parent, *clk; const char *parent_name; unsigned int i; diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c index 917fc737f254b916..7003d59ac34b1179 100644 --- a/drivers/clk/renesas/rzv2h-cpg.c +++ b/drivers/clk/renesas/rzv2h-cpg.c @@ -338,7 +338,7 @@ rzv2h_cpg_plldsi_div_clk_register(const struct cpg_core_clk *core, { struct rzv2h_plldsi_div_clk *clk_hw_data; struct clk **clks = priv->clks; - struct clk_init_data init; + struct clk_init_data init = {}; const struct clk *parent; const char *parent_name; struct clk_hw *clk_hw; @@ -582,7 +582,7 @@ rzv2h_cpg_plldsi_smux_clk_register(const struct cpg_core_clk *core, struct rzv2h_cpg_priv *priv) { struct rzv2h_plldsi_mux_clk *clk_hw_data; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *clk_hw; struct smuxed smux; int ret; @@ -711,7 +711,7 @@ rzv2h_cpg_pll_clk_register(const struct cpg_core_clk *core, const struct clk_ops *ops) { struct device *dev = priv->dev; - struct clk_init_data init; + struct clk_init_data init = {}; const struct clk *parent; const char *parent_name; struct pll_clk *pll_clk; @@ -1229,7 +1229,7 @@ rzv2h_cpg_register_mod_clk(const struct rzv2h_mod_clk *mod, { struct mod_clock *clock = NULL; struct device *dev = priv->dev; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk *parent, *clk; const char *parent_name; unsigned int id;