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Sat, 13 Jun 2026 15:26:57 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard Subject: [PATCH v10 1/6] dt-bindings: sun8i-v3s-ccu: Export MBUS and DRAM clocks to the public header Date: Sat, 13 Jun 2026 17:26:50 +0200 Message-ID: <20260613152655.212490-2-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; BAYES_HAM(-5.50)[99.99%]; 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FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Queue-Id: F3A2E1C026A X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= In order to declare a mbus node for the V3s, expose its associated clocks to the public header. Signed-off-by: Paul Kocialkowski Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-bindings/clock/sun8i-v3s-ccu.h index c4055629c9f9..d635bffd6914 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -87,7 +87,7 @@ #define CLK_SPI0 55 #define CLK_USB_PHY0 56 #define CLK_USB_OHCI0 57 - +#define CLK_DRAM 58 #define CLK_DRAM_VE 59 #define CLK_DRAM_CSI 60 #define CLK_DRAM_EHCI 61 @@ -101,7 +101,7 @@ #define CLK_VE 69 #define CLK_AC_DIG 70 #define CLK_AVS 71 - +#define CLK_MBUS 72 #define CLK_MIPI_CSI 73 /* Clocks not available on V3s */ From patchwork Sat Jun 13 15:26:51 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 2430 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4]) by mxe881.netcup.net (Postfix) with ESMTPS id A41211C026A for ; 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dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 88E8837002F4 for ; Sat, 13 Jun 2026 15:27:15 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 7FFC2B4551A; Sat, 13 Jun 2026 15:27:10 +0000 (UTC) X-Spam-Level: ** Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 1C25BB4551C; Sat, 13 Jun 2026 15:26:58 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard Subject: [PATCH v10 2/6] clk: sunxi-ng: v3s: Remove exported clock definitions Date: Sat, 13 Jun 2026 17:26:51 +0200 Message-ID: <20260613152655.212490-3-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; 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We can remove the duplicated definitons in the clock driver. Signed-off-by: Paul Kocialkowski --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h index 345cdbbab362..c933ef016570 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -39,14 +39,10 @@ /* The first bunch of module clocks are exported */ -#define CLK_DRAM 58 - /* All the DRAM gates are exported */ /* Some more module clocks are exported */ -#define CLK_MBUS 72 - /* And the GPU module clock is exported */ #define CLK_PLL_DDR1 74 From patchwork Sat Jun 13 15:26:52 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 2429 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id 820C41C026A for ; Sat, 13 Jun 2026 17:27:50 +0200 (CEST) Authentication-Results: mxe881; spf=pass (sender IP is 172.232.135.74) smtp.mailfrom=linux-sunxi+bounces-23812-noreply=patchwork.local@lists.linux.dev smtp.helo=sto.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.232.135.74 as permitted sender) client-ip=172.232.135.74; envelope-from=linux-sunxi+bounces-23812-noreply=patchwork.local@lists.linux.dev; helo=sto.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sto.lore.kernel.org (Postfix) with ESMTP id 82EF030065EC for ; Sat, 13 Jun 2026 15:27:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2F4482C0F81; Sat, 13 Jun 2026 15:27:34 +0000 (UTC) X-Original-To: linux-sunxi@lists.linux.dev Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DED082F9D98 for ; Sat, 13 Jun 2026 15:27:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781364454; cv=none; b=TT8JuGdmcgVn9Jfhg1xrUkFn2ROGPWemYBCHN9HR5jqWoedl26B2k6743uWf6FzFSFCGMZhXqhMKudMsaqybego1eBczP9ILR39a9+stNICNTtHuv11JlRNQUcQg2nbw9lYXNKuNMcBXYKFDPJAoUlbu71CnSe35f4SHV/sfGBw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781364454; c=relaxed/simple; bh=/31T6WAMjIR7AN2S3ymAQtgatmirOtaIef3/rrgW8Cw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=B0GnXIHDiREdC6fJcxSQ5eSfWJesSuc15EgyBAQ0KbdTIbqaI9wuSUmo3WZoGXfQOXQpWJuGdduLXdZVPUqnClEZ1W9OHMgbp+HcDBk5ZhauLXlNLlVK+FHeCdta7q6io9Qc5b2V8i3D5ttCHLef0uhadlWhkTx562/fIdeQUzU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id BF13C370030C for ; Sat, 13 Jun 2026 15:27:17 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 07726B4551A; Sat, 13 Jun 2026 15:27:15 +0000 (UTC) X-Spam-Level: ** Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 86935B45520; Sat, 13 Jun 2026 15:26:58 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v10 3/6] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect Date: Sat, 13 Jun 2026 17:26:52 +0200 Message-ID: <20260613152655.212490-4-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Paul Kocialkowski The V3s uses the mbus interconnect to provide DRAM access for a number of blocks. The SoC can only map 2 GiB of DRAM, which is reflected in the dma-ranges property. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi index fa54510319ac..02d6c62b3874 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -629,6 +629,21 @@ int_mii_phy: ethernet-phy@1 { }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-v3s-mbus"; + reg = <0x01c62000 0x1000>, + <0x01c63000 0x1000>; + reg-names = "mbus", "dram"; + clocks = <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names = "mbus", "dram", "bus"; + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x00000000 0x40000000 0x80000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; From patchwork Sat Jun 13 15:26:53 2026 Content-Type: text/plain; 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smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id A17A637002DC for ; Sat, 13 Jun 2026 15:27:20 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 08AA5B45524; Sat, 13 Jun 2026 15:27:17 +0000 (UTC) X-Spam-Level: ** Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 14C7EB45525; Sat, 13 Jun 2026 15:26:59 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard Subject: [PATCH v10 4/6] dt-bindings: sun6i-a31-mipi-dphy: Add V3s SoC compatible entry Date: Sat, 13 Jun 2026 17:26:53 +0200 Message-ID: <20260613152655.212490-5-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; BAYES_HAM(-5.50)[99.99%]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; MAILLIST(-0.15)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; FREEMAIL_CC(0.00)[magewell.com,sys-base.io,kernel.org,gmail.com,sholland.org,baylibre.com,redhat.com]; DMARC_NA(0.00)[sys-base.io]; FUZZY_BLOCKED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[sys-base.io:email,tor.lore.kernel.org:rdns,tor.lore.kernel.org:helo]; RCPT_COUNT_TWELVE(0.00)[18]; TAGGED_RCPT(0.00)[dt]; FROM_HAS_DN(0.00)[]; RCVD_COUNT_SEVEN(0.00)[7]; URIBL_MULTI_FAIL(0.00)[sys-base.io:server fail]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114]; TO_DN_SOME(0.00)[]; PRECEDENCE_BULK(0.00)[]; RCVD_TLS_LAST(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FROM_NEQ_ENVFROM(0.00)[paulk@sys-base.io,linux-sunxi@lists.linux.dev]; R_DKIM_NA(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; TAGGED_FROM(0.00)[bounces-23813-noreply=patchwork.local]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Queue-Id: BDF1F1C026A X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The V3s/V3/S3 comes with a rx-only D-PHY paired with the MIPI CSI-2 controller. It is compatible with the D-PHY found on the A31. Add an entry with a new compatible and the A31 compatible as fallback. Signed-off-by: Paul Kocialkowski --- .../devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml index 6a4fd4929959..3ca1a1c47032 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml @@ -21,6 +21,9 @@ properties: - items: - const: allwinner,sun50i-a64-mipi-dphy - const: allwinner,sun6i-a31-mipi-dphy + - items: + - const: allwinner,sun8i-v3s-mipi-dphy + - const: allwinner,sun6i-a31-mipi-dphy - items: - const: allwinner,sun20i-d1-mipi-dphy - const: allwinner,sun50i-a100-mipi-dphy From patchwork Sat Jun 13 15:26:54 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 2432 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id A44DF1C026A for ; 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dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 7FCA93700312 for ; Sat, 13 Jun 2026 15:27:28 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 97CAFB45525; Sat, 13 Jun 2026 15:27:27 +0000 (UTC) X-Spam-Level: ** Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 85322B45521; Sat, 13 Jun 2026 15:27:03 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v10 5/6] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Date: Sat, 13 Jun 2026 17:26:54 +0200 Message-ID: <20260613152655.212490-6-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; 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FROM_NEQ_ENVFROM(0.00)[paulk@sys-base.io,linux-sunxi@lists.linux.dev]; R_DKIM_NA(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; TAGGED_FROM(0.00)[bounces-23814-noreply=patchwork.local]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Queue-Id: A44DF1C026A X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Paul Kocialkowski MIPI CSI-2 is supported on the V3s with an A31-based MIPI CSI-2 bridge controller. The controller uses a separate D-PHY, which is the same that is otherwise used for MIPI DSI, but used in Rx mode. On the V3s, the CSI0 controller is dedicated to MIPI CSI-2 as it does not have access to any parallel interface pins. Add all the necessary nodes (CSI0, MIPI CSI-2 bridge and D-PHY) to support the MIPI CSI-2 interface. Note that a fwnode graph link is created between CSI0 and MIPI CSI-2 even when no sensor is connected. This will result in a probe failure for the controller as long as no sensor is connected but this is fine since no other interface is available. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi index 02d6c62b3874..03a1739683b1 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -671,6 +671,79 @@ gic: interrupt-controller@1c81000 { interrupts = ; }; + csi0: camera@1cb0000 { + compatible = "allwinner,sun8i-v3s-csi"; + reg = <0x01cb0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + interconnects = <&mbus 5>; + interconnect-names = "dma-mem"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi0_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi0>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-v3s-mipi-csi2", + "allwinner,sun6i-a31-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + phys = <&dphy>; + phy-names = "dphy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi0: endpoint { + remote-endpoint = <&csi0_in_mipi_csi2>; + }; + }; + }; + }; + + dphy: d-phy@1cb2000 { + compatible = "allwinner,sun8i-v3s-mipi-dphy", + "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01cb2000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_MIPI_CSI>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CSI>; + allwinner,direction = "rx"; + status = "disabled"; + #phy-cells = <0>; + }; + csi1: camera@1cb4000 { compatible = "allwinner,sun8i-v3s-csi"; reg = <0x01cb4000 0x3000>; From patchwork Sat Jun 13 15:26:55 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 2433 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114]) by mxe881.netcup.net (Postfix) with ESMTPS id 4332E1C026A for ; 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dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 3F58F370030C for ; Sat, 13 Jun 2026 15:27:34 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id B1552B45526; Sat, 13 Jun 2026 15:27:33 +0000 (UTC) X-Spam-Level: ** Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id E0CFEB45527; Sat, 13 Jun 2026 15:27:03 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v10 6/6] ARM: dts: sun8i: v3s: Add support for the ISP Date: Sat, 13 Jun 2026 17:26:55 +0200 Message-ID: <20260613152655.212490-7-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io> References: <20260613152655.212490-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; 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ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Queue-Id: 4332E1C026A X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Paul Kocialkowski The V3s (and related platforms) come with an instance of the A31 ISP. Even though it is very close to the A31 ISP, it is not exactly register-compatible and a dedicated compatible only is used as a result. Just like most other blocks of the camera pipeline, the ISP uses the common CSI bus, module and ram clock as well as reset. A port connection to the ISP is added to CSI0 for convenience since CSI0 serves for MIPI CSI-2 interface support, which is likely to receive raw data that will need to be processed by the ISP to produce a final image. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi index 03a1739683b1..628d5504c3ae 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -695,6 +695,14 @@ csi0_in_mipi_csi2: endpoint { remote-endpoint = <&mipi_csi2_out_csi0>; }; }; + + port@2 { + reg = <2>; + + csi0_out_isp: endpoint { + remote-endpoint = <&isp_in_csi0>; + }; + }; }; }; @@ -755,5 +763,32 @@ csi1: camera@1cb4000 { resets = <&ccu RST_BUS_CSI>; status = "disabled"; }; + + isp: isp@1cb8000 { + compatible = "allwinner,sun8i-v3s-isp"; + reg = <0x01cb8000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + interconnects = <&mbus 5>; + interconnect-names = "dma-mem"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + isp_in_csi0: endpoint { + remote-endpoint = <&csi0_out_isp>; + }; + }; + }; + }; }; };