From patchwork Fri Jul 31 16:30:26 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 2876 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 9A4DE1C0256 for ; Fri, 31 Jul 2026 18:53:56 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=baylibre.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24883-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24883-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 9213B3200AF7 for ; Fri, 31 Jul 2026 16:41:01 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4C81746E009; Fri, 31 Jul 2026 16:30:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="AArhCmWx" X-Original-To: linux-sunxi@lists.linux.dev Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AE2744E042 for ; Fri, 31 Jul 2026 16:30:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785515456; cv=none; b=p8q7cAvgqH1TJ9GvwamXBr68qb8YDfLghSEhEMKx/SQc97qZ78L++JxMa9WiOVMLRg3VYK0z4Qo6j/Cc1E/G2tFs9nc7HFRuod+caoHuzu8Zb9ri58xhUNR4lJ1cwwGY2zmHbiMpRDP+ss/R2DrFO4CFSlmy8VCAU60m54pVbbY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785515456; c=relaxed/simple; bh=0KxQNfxHtgxVP7p+J7kLnmloyIjqtkqU8bi4/9D5Pn4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gRywVPtgtJMvhFnSc1nN4niorlPCTwjPDzeGywkMIkP5mZVoPkEFKY0+61WK/BUPk1PsYPGBowqk4xeXAdJOguMbTSNhIjTCuOPTDMX00Bs7mATmwy3jqwqPU9gH0c1nzNRdFPf2xi26ueCye4c/9GG+Y4uRRM5exhIaqBYUFyc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=AArhCmWx; arc=none smtp.client-ip=209.85.221.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-47ddf7b09e5so1509836f8f.1 for ; Fri, 31 Jul 2026 09:30:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1785515452; x=1786120252; darn=lists.linux.dev; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=aXK3NWYi082LyOZjH5CFEpjpWT9epWTpuRaVAOKU4cw=; b=AArhCmWxTmWrAZvxQchHRnwprzWOQJ616htih0NTsEyin0KmDvtsPuRxthHy1XvW9p +ilgmxk5ZoZUd85dhH6yc9x+PcURSwkCMQ8tygNKX3aEQLeirR8c48IRVYocFtiiQkFU W51Wa2RjRoY9ggaGsD1ZnfWH8juGOlXzvZLynjJFulcFoiXFKoBjpR1eHIWPNoPCEGJ/ AH5joH9+EWfwKxzXwg1CnhYcvjFIi9l/5qOYUlZbmXSD7h1c5r3Z/UWsT/+NNemHVQe6 5yj1cHHC6cJBnoWabkX6UQqNZCxkarVcaFbLT8muzQ1DkMjwrUVphV46pw8sjynAnd7H JPRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1785515452; x=1786120252; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=aXK3NWYi082LyOZjH5CFEpjpWT9epWTpuRaVAOKU4cw=; b=Iynml2+pVHO3rYWT+vMzqaYxlVsFXC37J6Tedoq+7RgcLZyNUaW7+qULNRVozGjHLl LbXx37Lgvox/zpeixM21jzJ2vRg9yTgQazPi1EBptTZk7bNXEEqsUkecqptM7wXI/KYH NYsGNiEajIOnYCsXdFS6gm7BrbnOdcHI7j/olYdgDIIpIEkf/gBENZfkrs8l98jegGj3 KS+WRaHls9iR8aTb6AZZw1h/MT1zTVBxKA1GmAr2iRL5cd4u7NzNz6827n+iXODySTLM OnrzCWxbGl2HbZnsvFVHydRucQ5LHup07FMb/x4MvMxOZdPlPjwr9vdrHdMqKZhpYUXK MW5g== X-Forwarded-Encrypted: i=1; AHgh+RrvaP47/oaapeg2rgZBaKzHkRFfs61lWypxJZd6clG8PkOZthyxgKg5Eiy1Z7tSvuZtqyxGVUcXEij4LQ==@lists.linux.dev X-Gm-Message-State: AOJu0YyvMbBFp3BZ0fxetZ+Xqyfc5TYolN9E1aM0Oq8yJx/RkxP6JqR/ 5PScbtxJGDP7qSWmkiM983fnATJSR7DAk+DRL5qqnVblxEvfrM95D5PlSzTvrYO83wI= X-Gm-Gg: AR+sD10QdEpaBD1W0+GBh7eW2IPLkuidaUz5cq5XOTqSxMA5vQLvzXiARQwVytKhw+d plgfYsqifYgXtVF2VR3SU+gZGOLUU62epIagYuW2KvnNzn8KcnAxubhRDeSl9nXstBA2knsqFRz FGFtNFo9Pf38gDPJNhLsKE0Z0lwvepAvyayIp/Q6JGqdAM+tObyMJ/3wA6aismx975TgU5qMPpM /326hsJk+KfFrlVx9Fh+xT7Bjs5ZJDX9T4FgvEYEI8Od2JMvQy0XXG2Y7mZrlVdsXymMUwFmeVR FuldJN+TMcLHL5ikLSzJ0xNF5rFIcIDAcYviskZNogEygneVZtNlEqdC+HGaqH8a52bJNhEKa2s F4Fjy8TwvUf7LWFKhDSzso4gHo8staYFL31RYDhLh0fUeRY8AGNVkChvGgSZsDv9oHiKfdgGesL XKnMvjAFVZ3uOFN+xSzeXvEm5heAuL5sXa/S4s1W7uaMqP4dK6VCDsfr0kAQ== X-Received: by 2002:a05:6000:983:b0:47f:8f54:125f with SMTP id ffacd0b85a97d-47fd72a9038mr642064f8f.7.1785515448372; Fri, 31 Jul 2026 09:30:48 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:d00b:bc94:65a:a73d]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-47fd41e296csm6513850f8f.12.2026.07.31.09.30.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 09:30:47 -0700 (PDT) From: Jerome Brunet Date: Fri, 31 Jul 2026 18:30:26 +0200 Subject: [PATCH RFC/RFT 1/2] dt-bindings: net: sun8i-emac: Add A733 GMAC210 compatible Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260731-allwinner-a733-gmac-support-v1-1-d0a8732bfa82@baylibre.com> References: <20260731-allwinner-a733-gmac-support-v1-0-d0a8732bfa82@baylibre.com> In-Reply-To: <20260731-allwinner-a733-gmac-support-v1-0-d0a8732bfa82@baylibre.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Richard Cochran , Maxime Ripard , Maxime Coquelin , Alexandre Torgue , Philipp Zabel Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Jerome Brunet X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6093; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=0KxQNfxHtgxVP7p+J7kLnmloyIjqtkqU8bi4/9D5Pn4=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqbM2xquVAc309vSgKPGdFcjh7GkmzmsbHShAaG 2+Xz5vdSoWJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCamzNsQAKCRDm/A8cN/La hVYjD/4h49mYaowx0kPXeu4N+tawC2LKn/y5trYsXdnPdHmdfzHZtHE1sbRZCKd4zo3VNEpCkUz 3ZEyvd1719+F3UGAqXAndBPgq/sN0WCV7/9y6m8XRfeJWGXcljWdJKIRPMme3g5XzvoyGUDCPAn aQ25LXLBhtvnGX5DXbWYSLrYr2lPMu6w1ZxqRMg3eBfZbOBvnwljx2Qv7GDAHlIrvGb3Kgj0AsM FOgHmSnW8iSWx/NtDXciYBKu5P4cgv+c20KktVmdANY27RVQsfkeb/ozqs972CE4uTNBkuaEMB0 ygkCAj2lRmHFKpVxapgG9YD4/UE5zwxVzKQaAzLHOjwVazmXCWdB9tPTUoyaAdAkkTnyqdoEail k6iP0hNqNcGam9TmyMkEJkNaHOdswDX/D+H6bHN5lBeUzEoz1AHaAXZi/iDauKKV3tooyukOuGH nB2hz5KVP8+VG+vwRZTZZKLsXQQM8568MopRMKciRUtT5HLwjRItUVwVpHwqlmroVhRYyYfwCMu 49z8l+11BmRDapU7WzzqrQXCoTfTpsTvHwUu18vrpQYAJbnUnkS6fRKbG0l3Hv2DiPncxZeF7Y4 xma9MDf3jBOllSMS4tgfuAK60M+ntQPUI+mO7GkQdc2RO6qfmwpYuqR5FccHOg2MZU6H0CxAQqr OgQSoMmlrTaSxNQ== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-2.16 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; MAILLIST(-0.15)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:rdns,sea.lore.kernel.org:helo,0.0.0.1:email,baylibre.com:email,0.68.209.48:email]; TAGGED_RCPT(0.00)[netdev,dt]; RCPT_COUNT_TWELVE(0.00)[23]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10]; PRECEDENCE_BULK(0.00)[]; DMARC_NA(0.00)[baylibre.com]; FREEMAIL_TO(0.00)[lunn.ch,davemloft.net,google.com,kernel.org,redhat.com,gmail.com,sholland.org,foss.st.com,pengutronix.de]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; FROM_HAS_DN(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; TAGGED_FROM(0.00)[bounces-24883-noreply=patchwork.local]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jbrunet@baylibre.com,linux-sunxi@lists.linux.dev]; TO_DN_SOME(0.00)[] X-Rspamd-Queue-Id: 9A4DE1C0256 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The A733 GMAC210 is a DesignWare MAC 5.20 close to the A523 GMAC200, with the following differences: * The glue configuration registers are a dedicated MMIO region of the controller instead of a syscon register, so a second reg entry replaces the syscon phandle. * The DMA channels and the LPI event have their own interrupt lines. * A PTP reference clock and an AHB reset are needed. * Unlike the A523, the controller does not appear to belong to a power domain. * The TX clock delay field is 5 bits wide, allowing up to 3100ps. Add the new compatible and describe those differences. Signed-off-by: Jerome Brunet --- .../bindings/net/allwinner,sun8i-a83t-emac.yaml | 130 ++++++++++++++++++--- 1 file changed, 115 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml index 323a669fa982..fec42f46378a 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -22,6 +22,7 @@ select: - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac - allwinner,sun55i-a523-gmac200 + - allwinner,sun60i-a733-gmac210 required: - compatible @@ -44,25 +45,38 @@ properties: - items: - const: allwinner,sun55i-a523-gmac200 - const: snps,dwmac-4.20a + - items: + - const: allwinner,sun60i-a733-gmac210 + - const: snps,dwmac-5.20 reg: - maxItems: 1 + minItems: 1 + items: + - description: MAC controller registers + - description: Glue configuration registers interrupts: - maxItems: 1 + minItems: 1 + maxItems: 4 interrupt-names: - const: macirq + minItems: 1 + items: + - const: macirq + - const: eth_lpi + - const: tx-queue-0 + - const: rx-queue-0 clocks: minItems: 1 - maxItems: 2 + maxItems: 3 clock-names: minItems: 1 items: - const: stmmaceth - const: mbus + - const: ptp_ref phy-supply: description: PHY regulator @@ -87,7 +101,6 @@ required: - reset-names - phy-handle - phy-mode - - syscon allOf: - $ref: snps,dwmac.yaml# @@ -219,36 +232,94 @@ allOf: properties: compatible: contains: - const: allwinner,sun55i-a523-gmac200 + enum: + - allwinner,sun55i-a523-gmac200 + - allwinner,sun60i-a733-gmac210 then: properties: - clocks: - minItems: 2 - clock-names: - minItems: 2 tx-internal-delay-ps: default: 0 minimum: 0 - maximum: 700 multipleOf: 100 description: - External RGMII PHY TX clock delay chain value in ps. + Internal RGMII PHY TX clock delay chain value in ps. rx-internal-delay-ps: default: 0 minimum: 0 maximum: 3100 multipleOf: 100 description: - External RGMII PHY TX clock delay chain value in ps. - required: - - power-domains + Internal RGMII PHY RX clock delay chain value in ps. else: properties: + reg: + maxItems: 1 + interrupts: + maxItems: 1 + interrupt-names: + maxItems: 1 clocks: maxItems: 1 clock-names: maxItems: 1 power-domains: false + required: + - syscon + + - if: + properties: + compatible: + contains: + const: allwinner,sun55i-a523-gmac200 + then: + properties: + reg: + maxItems: 1 + interrupts: + maxItems: 1 + interrupt-names: + maxItems: 1 + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + resets: + maxItems: 1 + reset-names: + maxItems: 1 + tx-internal-delay-ps: + maximum: 700 + required: + - power-domains + - syscon + + - if: + properties: + compatible: + contains: + const: allwinner,sun60i-a733-gmac210 + then: + properties: + reg: + minItems: 2 + interrupts: + minItems: 4 + interrupt-names: + minItems: 4 + clocks: + minItems: 3 + clock-names: + minItems: 3 + resets: + minItems: 2 + reset-names: + minItems: 2 + tx-internal-delay-ps: + maximum: 3100 + syscon: false + power-domains: false unevaluatedProperties: false @@ -412,4 +483,33 @@ examples: }; }; }; + + - | + ethernet@4510000 { + compatible = "allwinner,sun60i-a733-gmac210", + "snps,dwmac-5.20"; + reg = <0x04510000 0x8000>, + <0x04518000 0x1000>; + clocks = <&ccu 58>, <&ccu 59>, <&ccu 60>; + clock-names = "stmmaceth", "mbus", "ptp_ref"; + resets = <&ccu 30>, <&ccu 31>; + reset-names = "stmmaceth", "ahb"; + interrupts = <0 175 4>, <0 179 4>, <0 176 4>, <0 177 4>; + interrupt-names = "macirq", "eth_lpi", "tx-queue-0", "rx-queue-0"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>; + phy-handle = <&ext_rgmii_phy_2>; + phy-mode = "rgmii-id"; + snps,fixed-burst; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ext_rgmii_phy_2: ethernet-phy@1 { + reg = <1>; + }; + }; + }; ... From patchwork Fri Jul 31 16:30:27 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 2887 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 3F7831C0251 for ; Fri, 31 Jul 2026 19:18:01 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=baylibre.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24884-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24884-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 839ED3205F21 for ; Fri, 31 Jul 2026 16:41:14 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6B3F646EF7C; Fri, 31 Jul 2026 16:31:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="DbZI9hCZ" X-Original-To: linux-sunxi@lists.linux.dev Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21E4B46EC6A for ; Fri, 31 Jul 2026 16:30:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785515461; cv=none; b=OTGr9HRNI3j1G8jOUHh1vuzYpg/fLEJS00nAQEkXEY4fpKWeiF+UXANfz4/8PUm7giWmvebxXwokjJnwavuNR0d6/JXMAoE2Vx1XvjB0/ny/CgAlEcUArOwRBpxtz2Uhw8IDrEWW91Gp26CpnJu69qIwsahb7P5/QG08Tw8wC2I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785515461; c=relaxed/simple; bh=R6z60t6FDjDvLZiOQXYefYIG0bNfh9SKw55q0G81SGM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ogun/70H7Db7LFF26OQcKyd6QtSSQjqF++CyNyTWlNaMA7oAEPBGY8V81bTAuteK72vqUccSWA5etCgqdEWu+8ik34hXu7OfkVCrj5wKwvJ/NKfd+6TqS1/7tMnTZk0QJFX7r2aFUkQcBvkKlBFRHu5DBu0OQ23uaqoMcacumuY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=DbZI9hCZ; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-47db714766aso1391572f8f.0 for ; Fri, 31 Jul 2026 09:30:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1785515455; x=1786120255; darn=lists.linux.dev; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=djWGAgZFPMEwkPACC0SH0yA3REA4ghQKhBwTkhJwSTQ=; b=DbZI9hCZCmu7K+yTdFtKS+Bfybmlumf1EYyVACr5r7nIJ40vPOTmh4P+lntpE1L3JP SlhRP1Z2hVFeRarH5bkr1taIDQf9JvZ1sEUYG8TGQutznBrgwiFxscq+m0n5ZB644zWy NmBtBAJb5stx8O4LV+vkBurcYzFzo8RxjJ5cC4RSm3sBcJwqNk/tpuI26YG56L+znT09 Ut1vLYb5D7nCWeV65LKn63wAgi0L/ZuLHh9cxsRnoQGSa8z08QzIHltSb1U5j3joVySf eS3Y/ZV7PxIA+OiRAKkBjFeNUJNiSCdgcTKIBB52X06A3G2xBU8SGDD3yb0gCqKe6KVw +dAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1785515455; x=1786120255; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=djWGAgZFPMEwkPACC0SH0yA3REA4ghQKhBwTkhJwSTQ=; b=Wv5DGbviCFj2XeSFNc9dCiZFjGC2SYOwMhVrrK8fPihOQ56Qhg9RxvIKdXb41wU1WO 8zsf20edGvyykDdmie2t+jxSbvUf9QhY9q3NyQHcUUJgpqUCUzqqyYB+go9K+1HDm9Xg WlJv6XVOo2rQwUjwrzgyf7kF5Kf8qGe3V/K+H8eCkLSBqdbaHvUJ+w0dmMz7LtonYLZC qqkLCzxXL1Dh9dJloof3SiD2qbnWQfdY0ZnS+brwfztV+gY2yruZSlgqYmdR5FrqkUXf lFhfZMX7XF3wO7WN2ZNaS/u1IDuHWJkMe9czIX+wdh4xqhOVV5q4pB0CDxpInEy3PRf2 z0tQ== X-Forwarded-Encrypted: i=1; AHgh+Rpcq2BiFer7c2c8Jr0ZrVRYmnB+m1hRqvgHKd6MAlQau7UI/Oq17SZAa1ZXW9u0ad1632xVZmWMSyunPA==@lists.linux.dev X-Gm-Message-State: AOJu0YwFqGs3oZM8egxEW733Bnq4byLNunHllZMs8u+Q/1FfCrhWteyQ eKoRymdWYFnf4Ag6KLB4LWgTNU0AChgO24+I9scblVlBh2r1GVpRDpgaFOm6lhfAA/4= X-Gm-Gg: AR+sD10XUKaKcLKBtymZjZLn2p01PgW1UrWewy60inIPdBZa4xwG8RNS+9JfsnLun7K TH0be4Bv7N7GlWsyLVe69T4YJ+arJzt7lmVXFnmyzxtrA2XxbwHGvTbuoGfwqDUEc7DQzREiEbF 44rfwpFstaSjzSI/qbiCKXiTZV4Uu+zqOpVnCbp1gMgm/gTeGqdDVTZh0YPSt1wPxRWdPD3fxSP u0r95+2myhbf0evrEQJ6p651n8bMBjXrkrgWfIuCPPiUgsffIfqkzCexcjPN1XhFk0RmuNminNC VjBJG0EsRSG+Lfs5jpNYSn/h5JGa70n1R5tGNqaiYzwNzr8DyvF1Eg78dBBRevbcZRBwkzvsfgg LzfvbPcecN0/JmM7d1XqdbAY+R3lsw8nif1SMpVEE3lYH+sqWEy8GKf8kj8JLdKuWnWVmgdLzW6 J6koGzeVIIhYKRFIwLOqLlrdED1228/f5CO+mzQMvI1jUKvp4M4KhJJfoeNA== X-Received: by 2002:a05:6000:1846:b0:47f:6e8b:699c with SMTP id ffacd0b85a97d-47fd729208fmr726837f8f.14.1785515455179; Fri, 31 Jul 2026 09:30:55 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:d00b:bc94:65a:a73d]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-47fd4562667sm6935966f8f.24.2026.07.31.09.30.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 09:30:54 -0700 (PDT) From: Jerome Brunet Date: Fri, 31 Jul 2026 18:30:27 +0200 Subject: [PATCH RFC/RFT 2/2] net: stmmac: Add support for Allwinner A733 GMAC210 Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260731-allwinner-a733-gmac-support-v1-2-d0a8732bfa82@baylibre.com> References: <20260731-allwinner-a733-gmac-support-v1-0-d0a8732bfa82@baylibre.com> In-Reply-To: <20260731-allwinner-a733-gmac-support-v1-0-d0a8732bfa82@baylibre.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Richard Cochran , Maxime Ripard , Maxime Coquelin , Alexandre Torgue , Philipp Zabel Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Jerome Brunet X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8196; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=R6z60t6FDjDvLZiOQXYefYIG0bNfh9SKw55q0G81SGM=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqbM2yrm2AuGpFLVpemVLX90B3DnBbzHrGoGWqT xiLTieBOeuJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCamzNsgAKCRDm/A8cN/La hegtD/wPspDO73Xa87akPckAschP4dgHAyp7127Gd1baf5ZpC5mHrFkJXQpW9DiH5scwiM465l+ /kS8Z8F/V8xxYrn6InOmmg/dw3Im+JiNr+W1C1xOiEAwzmTNPdfFLIOAv0V8tsjCj9bpgFecs+P QOPV3JtzpAvELG9QPOWIxEnOYwEdvP7uKtEK5GdqccTQd4ICtdKau1GlPaXRKjaPxhv960YnUWl jJrW3w/jXAcgMkwJLB/y0OVjiziU5HKrnCmrAHcvvMDjeYRs+q6rO5kmTcaBBNPdfWrmCAKjfAx t+JIUu1mHbWuFIG4S78NQNN6J4X9I89doMc8xQ6/2LW68RfiEJQJzKVp2Q5E4XxUwYs8XSxBSZC vTzp79KWSngh19GFNZy8KDFx2Bp1kPSDKFxY2xuTFMGhyTj+JNeJ1hlPV9m1rTkesoKvhBiUSVx N4x+SYbDcm497L01W8ONCfXmClBY+JNsPFNjefBlt6MfBGSPl3z26CioYv8WRKxavAamQWnaXt8 AIKw2rFOKWxIf0i8jV6PHQgag5tkp+byybxhFHvdnTU9YQCshdOpxxtcZyFC9qMNxgDlq2qdx44 X/NwUNm2POmlNsmBFMBLdKzYyjYJOlByszNC50hS74Bz0CHcBhBoU0gNs649jNUCrhb/KUjN7h7 Zma6cXT7h4ab0HQ== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-2.16 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; MAILLIST(-0.15)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:rdns,sea.lore.kernel.org:helo,baylibre.com:email]; TAGGED_RCPT(0.00)[netdev,dt]; RCPT_COUNT_TWELVE(0.00)[23]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10]; PRECEDENCE_BULK(0.00)[]; DMARC_NA(0.00)[baylibre.com]; FREEMAIL_TO(0.00)[lunn.ch,davemloft.net,google.com,kernel.org,redhat.com,gmail.com,sholland.org,foss.st.com,pengutronix.de]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; FROM_HAS_DN(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; TAGGED_FROM(0.00)[bounces-24884-noreply=patchwork.local]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jbrunet@baylibre.com,linux-sunxi@lists.linux.dev]; TO_DN_SOME(0.00)[] X-Rspamd-Queue-Id: 3F7831C0251 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The A733 GMAC210 is a DesignWare MAC 5.20 using an Allwinner glue close to the A523 GMAC200 already supported by this driver, with the following differences to handle: * The glue configuration registers are a dedicated MMIO region of the controller instead of a syscon register. This new register region appears to be in the reset domain of stmmac's main reset. This requires the glue driver to handle the reset rather than letting stmmac deal with it. * The TX clock delay value is 5 bits wide, split over 2 register fields, allowing delays up to 3100ps. * The DMA channels have their own interrupt lines, so the per-DMA-channel interrupt mode is enabled, as the vendor SDK does. * TX LPI clock gating is supported, as the vendor SDK indicates. Follow the PHY capability with STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP rather than forcing it on with the deprecated 'snps,en-tx-lpi-clockgating' DT property. Unlike the A523, both GMAC instances are supported by the same driver. Signed-off-by: Jerome Brunet --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c | 145 ++++++++++++++++++--- 1 file changed, 127 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c index 862df173d963..3d434a52fb02 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c @@ -10,21 +10,22 @@ */ #include +#include #include #include #include #include #include #include +#include #include #include +#include #include #include "stmmac.h" #include "stmmac_platform.h" -#define SYSCON_REG 0x34 - /* RMII specific bits */ #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ /* Generic system control EMAC_CLK bits */ @@ -37,17 +38,99 @@ #define SYSCON_ETCS_EXT_GMII 0x1 #define SYSCON_ETCS_INT_GMII 0x2 -static int sun55i_gmac200_set_syscon(struct device *dev, - struct plat_stmmacenet_data *plat) +struct sun55i_gmac_data { + struct regmap *(*get_regmap)(struct platform_device *pdev, + struct plat_stmmacenet_data *plat); + unsigned int flags; + u32 etxdc_ext_mask; + u32 offset; +}; + +static struct regmap *sun55i_gmac200_get_regmap(struct platform_device *pdev, + struct plat_stmmacenet_data *plat) +{ + struct regmap *map = + syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "syscon"); + + if (IS_ERR(map)) + dev_err_probe(&pdev->dev, PTR_ERR(map), "Unable to map syscon\n"); + + return map; +} + +static const struct regmap_config sun60i_a733_regmap_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, +}; + +static void sun60i_gmac210_reset_assert(void *data) { - struct device_node *node = dev->of_node; + struct reset_control *rst = data; + + reset_control_assert(rst); +} + +static struct regmap *sun60i_gmac210_get_regmap(struct platform_device *pdev, + struct plat_stmmacenet_data *plat) +{ + struct device *dev = &pdev->dev; + void __iomem *base; + int ret; + + base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(base)) { + dev_err_probe(dev, PTR_ERR(base), "unable to get glue memory region\n"); + return ERR_CAST(base); + } + + if (!plat->stmmac_rst || !plat->stmmac_ahb_rst) { + dev_err(dev, "missing required reset controls\n"); + return ERR_PTR(-EINVAL); + } + + /* + * The configuration registers are inside the controller + * reset domain, so the reset must happen before any write to them + * and should not be done again by stmmac or the configuration will + * be lost. + */ + ret = reset_control_assert(plat->stmmac_rst); + if (!ret) + ret = reset_control_deassert(plat->stmmac_rst); + + if (ret) { + dev_err_probe(dev, ret, "device reset failed\n"); + return ERR_PTR(ret); + } + + ret = devm_add_action_or_reset(dev, sun60i_gmac210_reset_assert, + plat->stmmac_rst); + if (ret) + return ERR_PTR(ret); + + plat->stmmac_rst = NULL; + + return devm_regmap_init_mmio(&pdev->dev, base, &sun60i_a733_regmap_cfg); +} + +static int sun55i_gmac200_setup(struct platform_device *pdev, + struct plat_stmmacenet_data *plat, + const struct sun55i_gmac_data *data) +{ + unsigned int lo_bits = hweight32(SYSCON_ETXDC_MASK); + struct device_node *node = pdev->dev.of_node; + struct device *dev = &pdev->dev; struct regmap *regmap; u32 val, reg = 0; + u32 max_delay; int ret; - regmap = syscon_regmap_lookup_by_phandle(node, "syscon"); + max_delay = (1U << (lo_bits + hweight32(data->etxdc_ext_mask))) - 1; + + regmap = data->get_regmap(pdev, plat); if (IS_ERR(regmap)) - return dev_err_probe(dev, PTR_ERR(regmap), "Unable to map syscon\n"); + return PTR_ERR(regmap); if (!of_property_read_u32(node, "tx-internal-delay-ps", &val)) { if (val % 100) @@ -55,12 +138,15 @@ static int sun55i_gmac200_set_syscon(struct device *dev, "tx-delay must be a multiple of 100ps\n"); val /= 100; dev_dbg(dev, "set tx-delay to %x\n", val); - if (!FIELD_FIT(SYSCON_ETXDC_MASK, val)) + if (val > max_delay) return dev_err_probe(dev, -EINVAL, - "TX clock delay exceeds maximum (%u00ps > %lu00ps)\n", - val, FIELD_MAX(SYSCON_ETXDC_MASK)); + "TX clock delay exceeds maximum (%u00ps > %u00ps)\n", + val, max_delay); - reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val); + reg |= field_prep(SYSCON_ETXDC_MASK, val); + if (data->etxdc_ext_mask) + reg |= field_prep(data->etxdc_ext_mask, + val >> lo_bits); } if (!of_property_read_u32(node, "rx-internal-delay-ps", &val)) { @@ -95,21 +181,29 @@ static int sun55i_gmac200_set_syscon(struct device *dev, phy_modes(plat->phy_interface)); } - ret = regmap_write(regmap, SYSCON_REG, reg); + ret = regmap_write(regmap, data->offset, reg); if (ret < 0) return dev_err_probe(dev, ret, "Failed to write to syscon\n"); + plat->flags |= data->flags; + plat->host_dma_width = 32; + return 0; } static int sun55i_gmac200_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat_dat; + const struct sun55i_gmac_data *data; struct stmmac_resources stmmac_res; struct device *dev = &pdev->dev; struct clk *clk; int ret; + data = device_get_match_data(dev); + if (!data) + return -EINVAL; + ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) return ret; @@ -118,11 +212,7 @@ static int sun55i_gmac200_probe(struct platform_device *pdev) if (IS_ERR(plat_dat)) return PTR_ERR(plat_dat); - /* BSP disables it */ - plat_dat->flags |= STMMAC_FLAG_SPH_DISABLE; - plat_dat->host_dma_width = 32; - - ret = sun55i_gmac200_set_syscon(dev, plat_dat); + ret = sun55i_gmac200_setup(pdev, plat_dat, data); if (ret) return ret; @@ -138,8 +228,27 @@ static int sun55i_gmac200_probe(struct platform_device *pdev) return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); } +static const struct sun55i_gmac_data sun55i_a523_gmac200_data = { + .get_regmap = sun55i_gmac200_get_regmap, + .flags = STMMAC_FLAG_SPH_DISABLE, + .offset = 0x34, + .etxdc_ext_mask = 0, +}; + +static const struct sun55i_gmac_data sun60i_a733_gmac210_data = { + .get_regmap = sun60i_gmac210_get_regmap, + .flags = (STMMAC_FLAG_SPH_DISABLE | + STMMAC_FLAG_MULTI_MSI_EN | + STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP), + .offset = 0x0, + .etxdc_ext_mask = GENMASK(17, 16), +}; + static const struct of_device_id sun55i_gmac200_match[] = { - { .compatible = "allwinner,sun55i-a523-gmac200" }, + { .compatible = "allwinner,sun55i-a523-gmac200", + .data = &sun55i_a523_gmac200_data }, + { .compatible = "allwinner,sun60i-a733-gmac210", + .data = &sun60i_a733_gmac210_data }, { } }; MODULE_DEVICE_TABLE(of, sun55i_gmac200_match);