From patchwork Mon Aug 3 10:14:47 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2911 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id C23111C0164 for ; Mon, 3 Aug 2026 12:21:51 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24941-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24941-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 6C6A630B2944 for ; Mon, 3 Aug 2026 10:15:13 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A6D2437AA77; Mon, 3 Aug 2026 10:15:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="c2Fm56IH" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3967C377ABE for ; Mon, 3 Aug 2026 10:15:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752108; cv=none; b=rRcGKCq96ERxmc+EcdWlCevLBZ86gi4BpOoTzJ5x5mRv6NrTd28QIb+oqUWDf336vD39eMLHhoSA0RjHhkLbjhqPp4oUzsyaetGp2R7GwV5RIAYuISpEDdyXdmc8a+EmVmApivdtSFRzW1X6q1aevb28RB1XCwJQgh3tavjxmD4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752108; c=relaxed/simple; bh=VDCFDjjzMueT3uC3KTWgxQYVR++dcRtmQp4VgUJgJnY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rXJKRelZw7ch5TKuw75E0NOHjHVdGeeryuVRuzZnHc6P2p5nZqNQ9XGPEeOfT043NLnjjyz6Wvoqo6EbImhuMzZ5VXrPcKauQqigc6zJOV0T4XcYN6i5CQ2hy1ND2yA1CWMpP1OpvBKTAhb6yTGa1myNW6MLk+kKdwRH8hvZSaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=c2Fm56IH; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7EDB81476; Mon, 3 Aug 2026 03:15:02 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 22A633F632; Mon, 3 Aug 2026 03:15:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752106; bh=VDCFDjjzMueT3uC3KTWgxQYVR++dcRtmQp4VgUJgJnY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c2Fm56IHDW776AjxEwkEjJlr6yeoqh9t4NrATKRW0HPew47HNVW+d3aVw98NGOVSG mUWTWK8ohP0FGpaP7JYvEbrlDMHHnklUwdo5zhxg5TJ2PrG4dSad8a+uWCoyl2y1ut kwYPVOw2g7KwHReAshZZfGQ8CoL73f9K218Enoq0= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/6] net: phy: maxio: prepare for more DT properties Date: Mon, 3 Aug 2026 12:14:47 +0200 Message-ID: <20260803101452.2993721-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The probe routine for the Maxio PHY returns early if the optional maxio,clk-out-frequency-hz property is not found. That prevents looking for other properties. Refactor the routine to handle the property in an if-clause, to allow more actions in the probe routine later. Signed-off-by: Andre Przywara --- drivers/net/phy/maxio.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/phy/maxio.c b/drivers/net/phy/maxio.c index d2cb23895646..95a2169f25df 100644 --- a/drivers/net/phy/maxio.c +++ b/drivers/net/phy/maxio.c @@ -43,18 +43,18 @@ static int maxio_mae0621a_probe(struct phy_device *phydev) ret = device_property_read_u32(dev, "maxio,clk-out-frequency-hz", &frequency); - if (ret == -EINVAL) - return 0; - if (ret) + if (!ret) { + if (frequency != 125000000) { + phydev_err(phydev, "invalid CLKOUT frequency %u\n", + frequency); + return -EINVAL; + } + + priv->clk_out_125m = true; + } else if (ret != -EINVAL) { return ret; - - if (frequency != 125000000) { - phydev_err(phydev, "invalid CLKOUT frequency %u\n", frequency); - return -EINVAL; } - priv->clk_out_125m = true; - return 0; } From patchwork Mon Aug 3 10:14:48 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2913 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id C4CCD1C0164 for ; Mon, 3 Aug 2026 12:22:04 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24942-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24942-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 8D054300A487 for ; Mon, 3 Aug 2026 10:15:20 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5EE5137D135; Mon, 3 Aug 2026 10:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="e5hk1uuD" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F16BB37BE81 for ; Mon, 3 Aug 2026 10:15:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752112; cv=none; b=a4/E3SqoBXv9TWQNslg5vPN553F2j+fd4ah7AGMHaL2KzVaMrMv9y8iFa879sAxzP/kIBXF525g0GUbLAWxCzkM21fOxPywiqjWNeL82oaAniB8bEb2b106Hoo3CO3kh7pz1T0loS/5Qtwfr2qafqqdKePu9Ey+IlxYdUbYxELw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752112; c=relaxed/simple; bh=JZrZ65rYM8tLXtMMEeRF1Po3l4gxMqcIvdVNOlz/RbI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ueV/FEZJo15+B952Jjy2oZgCt2BgtZYJS1gmyjohs0dxxgwxIJcinx+n2BLcyTRPCMw2P0CfFgd5Rg1ABAGU5qlCq2k1tJrdbwfKyq8flL8xmPQ+4SQbhoxJ8ZNsf7+tcG5JkHREvZo4QeYcaUgtWkwJK859TY7zhM6wMQ7ZXxA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=e5hk1uuD; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 525631595; Mon, 3 Aug 2026 03:15:06 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EA30F3F632; Mon, 3 Aug 2026 03:15:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752110; bh=JZrZ65rYM8tLXtMMEeRF1Po3l4gxMqcIvdVNOlz/RbI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=e5hk1uuD+1XmiLWjy/1AzfBHfSEAPlO/RIT6Hf5hLgWgIM9whs/nI81iOv07CTtRq q1ERnp9EXCRobQaNNIzrEAnRMJ0tTHJ3uRh2WvStA9dcghYWTyDJ1Ex/XmVN9b4diA YaxNYd9EzdNV7pA5M/GizmaRcHejHYH3EjwJmRNE= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/6] net: phy: maxio: parse and enable PHY clock from generic DT binding Date: Mon, 3 Aug 2026 12:14:48 +0200 Message-ID: <20260803101452.2993721-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The generic PHY DT binding features a clocks property, which describes the clock input to the PHY. Typically this is a crystal oscillator, so it works without software interaction. But some boards want to save some pennies on that part, and let a clock fanout pin from the SoC provide this clock signal. In this case the PHY probe routine needs to enable this clock explicitly. Look for a "clocks" property inside the PHY node and enable that clock, if one is provided. This allows boards with a SoC-driven PHY clock to use the PHY. Please note that without the clock enabled, the PHY will not be detected on the MDIO bus, so the PHY-ID needs to be explicitly named in the PHY compatible string: compatible = "ethernet-phy-id7b74.4411"; Signed-off-by: Andre Przywara Reviewed-by: Andrew Lunn --- drivers/net/phy/maxio.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/maxio.c b/drivers/net/phy/maxio.c index 95a2169f25df..5fabf99fb90f 100644 --- a/drivers/net/phy/maxio.c +++ b/drivers/net/phy/maxio.c @@ -2,6 +2,7 @@ /* Driver for Maxio Ethernet PHYs. */ #include +#include #include #include #include @@ -15,6 +16,7 @@ #define MAXIO_MAE0621A_CLKOUT_ENABLE BIT(0) struct maxio_priv { + struct clk *clk; bool clk_out_125m; }; @@ -55,6 +57,11 @@ static int maxio_mae0621a_probe(struct phy_device *phydev) return ret; } + /* PHY clock from the generic PHY binding */ + priv->clk = devm_clk_get_optional_enabled(&phydev->mdio.dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + return 0; } From patchwork Mon Aug 3 10:14:49 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2916 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id 2DE3B1C08B0 for ; Mon, 3 Aug 2026 12:33:17 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.232.135.74) smtp.mailfrom=linux-sunxi+bounces-24943-noreply=patchwork.local@lists.linux.dev smtp.helo=sto.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.232.135.74 as permitted sender) client-ip=172.232.135.74; envelope-from=linux-sunxi+bounces-24943-noreply=patchwork.local@lists.linux.dev; helo=sto.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sto.lore.kernel.org (Postfix) with ESMTP id B98E53045025 for ; Mon, 3 Aug 2026 10:15:26 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3036D37A4AB; Mon, 3 Aug 2026 10:15:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="m3iJUsgL" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9C67937C0FB for ; Mon, 3 Aug 2026 10:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752116; cv=none; b=FceU9AWCJwwPvMzGcT35fqkOOHGEZtQO1Qrv82wMcHE0Fw4b073ihIlrzo4jn2JVumVqr1AGAUFGZQ+ug6ObxoKijfRlLfJLWhEj6TtdmkTBrlUvJlHrdCsnKDGqPxQwWQkp9y4ACGBJdmw3CDrSO03URBcWVj1uWC6ZQM4bUi4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752116; c=relaxed/simple; bh=Ca4WNKwt2jZCjoz4pJbAO6t+h4BpkJ3DGmk2qwJhIwg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aP5y2ZlIYDs3M4a5u48Mc+kN6NJpBTBGTtht7bmPuHqW4gxh4EQMpCT+sJmA5+sozva+dxnu54Q1mIyJHicAyNFFetbF/mjc5ME+dyX09nlbSaPoAPMD+E2BP2CMTgrHsefUP8jNKZveP/OmNUe84+TAgV45VdFTHmQsBAvisjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=m3iJUsgL; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 260A71596; Mon, 3 Aug 2026 03:15:10 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BDBA43F632; Mon, 3 Aug 2026 03:15:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752114; bh=Ca4WNKwt2jZCjoz4pJbAO6t+h4BpkJ3DGmk2qwJhIwg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m3iJUsgLVOZMW4Vrp/KBT8ByLEkfSIlzXzbfHzwEEbi57tgaEm8FZCs4HFj5a9j1U vE729Mt8slcrB2SZlaz9wchSpEQCND9D91h+iGk9EoUPTtOVfpP5IrD5Ny10JcWu9M nUY+UQFPL/y5S0x0wGaRUwalsTdOsMgpdxwh0QMU= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/6] dt-bindings: net: Maxio PHY: add PHY-ID for -Q2C variant Date: Mon, 3 Aug 2026 12:14:49 +0200 Message-ID: <20260803101452.2993721-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The Maxio MAE0621A PHY is out there in at least two variants: the MAE0621A-Q3C chip, with the PHY-ID 0x7b744412, and the -Q2C variant, identifying as 0x7b744411. Allow both IDs to be used as the PHY compatible string, to potentially avoid probing, which might fail due to unavailable resources (clock). Signed-off-by: Andre Przywara Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/net/maxio,mae0621a.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml b/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml index f1ea54583225..c4d06c626168 100644 --- a/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml +++ b/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml @@ -14,7 +14,9 @@ allOf: properties: compatible: - const: ethernet-phy-id7b74.4412 + enum: + - ethernet-phy-id7b74.4411 + - ethernet-phy-id7b74.4412 maxio,clk-out-frequency-hz: description: From patchwork Mon Aug 3 10:14:50 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2914 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 9F22D1C083E for ; Mon, 3 Aug 2026 12:22:27 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24944-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24944-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 12E4330C3985 for ; Mon, 3 Aug 2026 10:15:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 76A1D3812F4; Mon, 3 Aug 2026 10:15:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="GOmfoRQb" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B0D2037BE83 for ; Mon, 3 Aug 2026 10:15:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752121; cv=none; b=pykvhk83Dngb7dtb0qXhiMkaoxAjZBD2ATqvuqvTgOKCFTNUq94LfweRLnc+LWJx6NyqeBRo1X2O5Dw7+ek/r09DOoChkoKKROnQ/i32P3Sf1VymTLqqljcHW2pMCwUt0XEpMTEaB+ganPDuVgtkMGpz3Zf+SROXD16D2I689aw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752121; c=relaxed/simple; bh=QOzvt9t/MIRWZBLs3wy9qmzt+LKR/lt21R4C8HB6byU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CRIE32uln6n12W5rcPUXgsGR7Mca/KBrX/XTSh8v26NZZI7WUqV26j9JyCXUVs2cAeB8lBJ13UIhi6cKRooW4YrbuDuPUs2IREw0b40A7XKW2LMtdBSzVdbPdhA0DNPN9CrigQ5qNQvaNeDL6Z/Esvp3wNN/5Pl81YWZrK/IXl0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=GOmfoRQb; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A2A115A1; Mon, 3 Aug 2026 03:15:14 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 901A83F632; Mon, 3 Aug 2026 03:15:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752118; bh=QOzvt9t/MIRWZBLs3wy9qmzt+LKR/lt21R4C8HB6byU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GOmfoRQbY+zr8SjY5r3n9rMeI5Q7MMm+HUliKJZf5pZmLr4Si9fDOV/myP9Dvmiit YmNcfVuGzl4znJ63ZvzGg+XzMuWnT7Vne6VZRhmWaUusehotNYa4ncOyfV2IUuqdXm Bo/dsIJSuQq0t9nGHmFc8+7CJON0vCNpN8o5FUDE= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] net: phy: maxio: extend PHY ID matching Date: Mon, 3 Aug 2026 12:14:50 +0200 Message-ID: <20260803101452.2993721-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= Currently the maxio Ethernet PHY driver expects a PHY matching exactly the one ID provided: 0x7b744412. The Maxio MAE0621A-Q3C model used on the Allwinner based X96QPro+ TV box uses a slightly different PHY ID: 0x7b744411. Replace the "exact match" requirement with the more relaxed "model match" version, which ignores the lowest 4 bits of the PHY ID. Both PHYs should now be recognised by the driver. Signed-off-by: Andre Przywara --- drivers/net/phy/maxio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/maxio.c b/drivers/net/phy/maxio.c index 5fabf99fb90f..d97fb50cdbe1 100644 --- a/drivers/net/phy/maxio.c +++ b/drivers/net/phy/maxio.c @@ -87,7 +87,7 @@ static int maxio_mae0621a_config_init(struct phy_device *phydev) static struct phy_driver maxio_drivers[] = { { - PHY_ID_MATCH_EXACT(MAXIO_MAE0621A_PHY_ID), + PHY_ID_MATCH_MODEL(MAXIO_MAE0621A_PHY_ID), .name = "Maxio MAE0621A", .probe = maxio_mae0621a_probe, .config_init = maxio_mae0621a_config_init, @@ -100,7 +100,7 @@ static struct phy_driver maxio_drivers[] = { module_phy_driver(maxio_drivers); static const struct mdio_device_id __maybe_unused maxio_tbl[] = { - { PHY_ID_MATCH_EXACT(MAXIO_MAE0621A_PHY_ID) }, + { PHY_ID_MATCH_MODEL(MAXIO_MAE0621A_PHY_ID) }, { } }; MODULE_DEVICE_TABLE(mdio, maxio_tbl); From patchwork Mon Aug 3 10:14:51 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2912 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id 4A9F21C0164 for ; Mon, 3 Aug 2026 12:21:58 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.232.135.74) smtp.mailfrom=linux-sunxi+bounces-24945-noreply=patchwork.local@lists.linux.dev smtp.helo=sto.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.232.135.74 as permitted sender) client-ip=172.232.135.74; envelope-from=linux-sunxi+bounces-24945-noreply=patchwork.local@lists.linux.dev; helo=sto.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sto.lore.kernel.org (Postfix) with ESMTP id 52F3D304E366 for ; Mon, 3 Aug 2026 10:15:36 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F2E112F8EB3; Mon, 3 Aug 2026 10:15:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="XDWWD/OJ" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5785D35E1A4 for ; Mon, 3 Aug 2026 10:15:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752123; cv=none; b=dpZooAlU3vxzfgGjVSIeaZEJW10fz7XsutiEtMJLxzoly6jOGDYslCtKrHOu7NhS5wglwh80O5231+Lh0tQcLiyJz4S+hqa1oJv1UEI5kblw1FZ+GSy82FxZPB9PzxFwi+ucMVtsCgO3kFDIS0tFetbB/ekZI37fYmzm6qAPgrU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752123; c=relaxed/simple; bh=7wKHyfp4niHGBBx0/iWDlvVSkvWtxK1CYYaYiNUVvDU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=do1raE+8FbuPVCvYcENp9c7JXOZxFb+fOrOY6qEHojEgo639xuhTlbq2U8526m6zBCAdcljqQiWFLEdvpTOdD2bnDWdpV92wGCObLWP0uDhBJTtU5myHLWL867EAZ3S1FXi8TnAUkbA1vPkI73kFYOKg19EQ1OMaGcPYPF5SJac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=XDWWD/OJ; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DDEE11655; Mon, 3 Aug 2026 03:15:17 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 751373F632; Mon, 3 Aug 2026 03:15:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752121; bh=7wKHyfp4niHGBBx0/iWDlvVSkvWtxK1CYYaYiNUVvDU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XDWWD/OJndvPR8SzBLqtBJSfQWqYWHAxOTSwNBeMSeavGzEJqsl7s+PzFZtwarv9l InZ866CijNYmiuH8ktqG3li09BXIwWHlVuOOdG8Jt6NsGheDlNsfjNerQ2YkviUQby 7d18+vROmKDOiGSrdSxECO3d5+cfx3I7netYF9Ck= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/6] arm64: dts: allwinner: a523: add EPHY 25MHz clock fanout pins Date: Mon, 3 Aug 2026 12:14:51 +0200 Message-ID: <20260803101452.2993721-6-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The Allwinner A523 SoC family provides two clock fanout pins, which are backed by gated clocks fixed to 25 MHz, divided down from the main peripheral PLL. Those are meant to clock an Ethernet PHY, and allow to save an external crystal oscillator typically employed for that purpose. Add the pin descriptions of the two pins for those clocks, one is within the RGMII0 pins, the other within the RGMII1 pins, although the clock fanout works completely independently from the two MACs. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index ca6a16807049..1a95c0a21509 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -147,6 +147,20 @@ pio: pinctrl@2000000 { interrupt-controller; #interrupt-cells = <3>; + /omit-if-no-ref/ + ephy0_25m_pin: ephy0-25m-pin { + pins = "PH13"; + allwinner,pinmux = <5>; + function = "ephy_25m"; + }; + + /omit-if-no-ref/ + ephy1_25m_pin: ephy1-25m-pin { + pins = "PJ10"; + allwinner,pinmux = <5>; + function = "ephy_25m"; + }; + /omit-if-no-ref/ i2s2_pi_pins: i2s2-pi-pins { pins = "PI2", "PI3", "PI4", "PI5"; From patchwork Mon Aug 3 10:14:52 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 2915 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 0EEBD1C0580 for ; Mon, 3 Aug 2026 12:22:38 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=arm.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-24946-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; envelope-from=linux-sunxi+bounces-24946-noreply=patchwork.local@lists.linux.dev; helo=sea.lore.kernel.org; Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sea.lore.kernel.org (Postfix) with ESMTP id 5BDE930C6946 for ; Mon, 3 Aug 2026 10:15:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C842A37F32E; Mon, 3 Aug 2026 10:15:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="k8rZGnfZ" X-Original-To: linux-sunxi@lists.linux.dev Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 563EE37AA65 for ; Mon, 3 Aug 2026 10:15:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752127; cv=none; b=ZCSU1pmw/JSVH6xORP02tOK0x96bZiN6B9o8PUeTki+zwpkQCYDcSzvgIJtskWm5j24FY5O2gn0A3a0f5HjzA6TOt7AQwXpnWmFLAURkeIZ+sLj2ZzFxCOr1ziQieGtkCgL39ky5PNnBUuNSNRfSulh0bcPfP75H8Fasmgbo6tQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752127; c=relaxed/simple; bh=VqSq/RFgnYRFkrdByzSG0050K4hOTZSeg3klIsefLjs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qy33c9G1KEQx1XoMUsdNMvsY/h5Y10vPw6RLPPjj8m9UxUKM8djru+xpv+GZ8+CA1My+oZARoLSsCLBKeO3L12xKwVfl4Lckkogsdga8CepP+PNVmDF+DvJAQ4pl+LQgH0pV6ngEibQe3AhYjHq+4AyGYTNUB/vsBIlic20KdCo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=k8rZGnfZ; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BC4F7165C; Mon, 3 Aug 2026 03:15:21 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 55AC93F632; Mon, 3 Aug 2026 03:15:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785752125; bh=VqSq/RFgnYRFkrdByzSG0050K4hOTZSeg3klIsefLjs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k8rZGnfZxZfbkexDhrnLAo1lZg5wso/9INZUYurtRxpRj7B8bPg6xTk8nzMWCBSaF 9Zw1t9V4MSO7PN7u5CcloZo0nKDfp54uLwByTmOZWJ/SUqdGzWx2BoFWbjlCBc/6hr uGWf8cAnHL7Hfb+DTP6ePo02wG0GlE7l/0lOOqRo= From: Andre Przywara To: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiner Kallweit , Russell King Cc: Liu Changjie , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/6] arm64: dts: allwinner: a523: x96qpro+: enable Ethernet support Date: Mon, 3 Aug 2026 12:14:52 +0200 Message-ID: <20260803101452.2993721-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260803101452.2993721-1-andre.przywara@arm.com> References: <20260803101452.2993721-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The X96QPro+ TV Box features a Gigabit Ethernet capable port, which is driven by the secondary EMAC, and supported by a Maxio MAE0621A PHY. Add the required devicetree nodes to enable that port. The PHY is not clocked by an external crystal oscillator, but relies on a SoC-provided clock fanout pin for its 25 MHz reference input clock. The clock is referenced in the PHY DT node, which not all systems might enable before scanning the MDIO bus. To help with that problem, the PHY compatible string is using the PHY ID, which means the MDIO bus scanning can be skipped. Signed-off-by: Andre Przywara --- .../dts/allwinner/sun55i-h728-x96qpro+.dts | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts index a96927fbdadd..568a4fae84df 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart0; + ethernet0 = &gmac1; }; chosen { @@ -54,11 +55,38 @@ &ehci1 { status = "okay"; }; +&gmac1 { + clocks = <&ccu CLK_BUS_EMAC1>, <&ccu CLK_MBUS_EMAC1>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>; + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_cldo3>; + + tx-internal-delay-ps = <200>; + rx-internal-delay-ps = <500>; + + status = "okay"; +}; + &gpu { mali-supply = <®_dcdc2>; status = "okay"; }; +&mdio1 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-id7b74.4411"; + reg = <1>; + clocks = <&ccu CLK_EMAC1_25M>; + pinctrl-names = "default"; + pinctrl-0 = <&ephy_25m_pin>; + reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; +}; + &mmc0 { vmmc-supply = <®_vcc3v3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */