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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j2-000vXD-05; Mon, 14 Sep 2026 17:36:08 +0200 From: Jonas Rebmann Date: Mon, 14 Sep 2026 17:35:55 +0200 Subject: [PATCH v3 1/6] spi: spi-sun4i: sun4i_spi_transfer_one(): fix transfers for SUN4I_FIFO_DEPTH Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260914-spi-sun4i-fixes-v3-1-9fe919d5cecf@pengutronix.de> References: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> In-Reply-To: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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FROM_HAS_DN(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; FROM_NEQ_ENVFROM(0.00)[jre@pengutronix.de,linux-sunxi@lists.linux.dev]; R_SPF_ALLOW(0.00)[+ip4:172.232.135.74]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,ultimaker.com]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a0a:edc0:0:1101:1d::ac:received,100.90.174.1:received,185.203.200.13:received,2a0a:edc0:0:c01:1d::a2:received]; RCVD_COUNT_FIVE(0.00)[6]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; R_DKIM_NA(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.232.128.0/19, country:SG]; RCVD_TLS_LAST(0.00)[]; TAGGED_FROM(0.00)[bounces-25903-noreply=patchwork.local]; MIME_TRACE(0.00)[0:+]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.232.135.74:from] X-Rspamd-Queue-Id: A75CB1C347D X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Marc Kleine-Budde In commit 6d9fe44bd73d ("spi: sun4i: fix FIFO limit"), the TX-FIFO is filled max to SUN4I_FIFO_DEPTH - 1 (= 63) bytes to work around timeouts observed on A10s SoCs. Commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") added support for transfers larger than the FIFO size. But this commit only enabled the TX-FIFO empty interrupt for transfers larger than the FIFO (= 64) bytes. This breaks transfers with exactly 64 bytes: the TX-FIFO is only filled with 63 bytes but the interrupt to refill the FIFO is not triggered. The problem can be reproduced with the following command: | spidev_test -D /dev/spidev0.1 -S 64 -s 20000000 -I 1 | | [ 7797.548745] spi_master spi0: spi0.1: timeout transferring 64 bytes@20000000Hz for 110(100)ms | [ 7797.557237] spidev spi0.1: SPI transfer failed: -110 | [ 7797.562308] spi_master spi0: failed to transfer one message from queue | [ 7797.568936] spi_master spi0: noqueue transfer failed To fix the problem enable the TX-FIFO interrupt if the total TX length is larger than SUN4I_FIFO_DEPTH - 1 (= 63) bytes. Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index d5c16392cd4d..2e2324453905 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -322,7 +322,7 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC | SUN4I_INT_CTL_RF_F34); /* Only enable Tx FIFO interrupt if we really need it */ - if (tx_len > SUN4I_FIFO_DEPTH) + if (tx_len > SUN4I_FIFO_DEPTH - 1) sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TF_E34); /* Start the transfer */ From patchwork Mon Sep 14 15:35:56 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Rebmann X-Patchwork-Id: 3332 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114]) by mxe881.netcup.net (Postfix) with ESMTPS id 6AE821C347D for ; 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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j2-000vXD-0H; Mon, 14 Sep 2026 17:36:08 +0200 From: Jonas Rebmann Date: Mon, 14 Sep 2026 17:35:56 +0200 Subject: [PATCH v3 2/6] spi: spi-sun4i: sun4i_spi_fill_fifo(): always apply A10 FIFO fill level workaround Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260914-spi-sun4i-fixes-v3-2-9fe919d5cecf@pengutronix.de> References: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> In-Reply-To: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2965; i=jre@pengutronix.de; h=from:subject:message-id; bh=rKlhrsReCvLLuuOh1xsyoda4LwKg4i1Q+rNz/5zEokw=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYshaIZJapfPtPof/+33icrZsfekyvw5OeNyp4XHDo+RAx QRjv70zOkpZGMS4GGTFFFli1eQUhIz9r5tV2sXCzGFlAhnCwMUpABPpE2D4H/rpnJn4xqlT97pd VL3w72LR+fiCKne38gn2+T0KW1W8oxn+Sp7I3yDa1TdvvvQEp+3BoubigWVNccazONjUJFaZTpr JAwA= X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Marc Kleine-Budde In commit 6d9fe44bd73d ("spi: sun4i: fix FIFO limit"), the TX FIFO is filled max to SUN4I_FIFO_DEPTH - 1 (= 63) bytes to work around timeouts observed on A10s SoCs. Commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") added support for transfers larger than the FIFO size. This commit did not consider the A10 workaround (limit the TX FIFO fill size to SUN4I_FIFO_DEPTH - 1 (= 63) bytes) for refilling the TX FIFO in the IRQ handler. To apply the workaround independent from where sun4i_spi_fill_fifo() is called, remove the length argument from the function and directly take the max fill level of SUN4I_FIFO_DEPTH - 1 into account when calculating the free space in the FIFO. Due to the lack of HW this patch has not been tested on an A10 SoC, but on an A20 SoC. It was not possible to reproduce the timeout on the A20. Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 2e2324453905..3649bcabcc9a 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -142,15 +142,21 @@ static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len) } } -static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len) +static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi) { u32 cnt; + int len; u8 byte; - /* See how much data we can fit */ - cnt = SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi); + /* + * See how much data we can fit + * + * Filling the FIFO fully causes timeout for some reason + * at least on spi2 on A10s + */ + cnt = SUN4I_FIFO_DEPTH - 1 - sun4i_spi_get_tx_fifo_count(sspi); - len = min3(len, (int)cnt, sspi->len); + len = min_t(int, cnt, sspi->len); while (len--) { byte = sspi->tx_buf ? *sspi->tx_buf++ : 0; @@ -311,12 +317,8 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); - /* - * Fill the TX FIFO - * Filling the FIFO fully causes timeout for some reason - * at least on spi2 on A10s - */ - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); + /* Fill the TX FIFO */ + sun4i_spi_fill_fifo(sspi); /* Enable the interrupts */ sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC | @@ -373,7 +375,7 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id) /* Transmit FIFO 3/4 empty */ if (status & SUN4I_INT_CTL_TF_E34) { - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); + sun4i_spi_fill_fifo(sspi); if (!sspi->len) /* nothing left to transmit */ From patchwork Mon Sep 14 15:35:57 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Rebmann X-Patchwork-Id: 3334 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id 17BB11C34CE for ; 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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j2-000vXD-0U; Mon, 14 Sep 2026 17:36:08 +0200 From: Jonas Rebmann Date: Mon, 14 Sep 2026 17:35:57 +0200 Subject: [PATCH v3 3/6] spi: spi-sun4i: sun4i_spi_transfer_one(): fix setting of clock rate Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260914-spi-sun4i-fixes-v3-3-9fe919d5cecf@pengutronix.de> References: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> In-Reply-To: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2341; i=jre@pengutronix.de; h=from:subject:message-id; bh=8jF4t92Su/td/gKjKHd6aLFRQ4M8x8W1ief58M4F30I=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYshaIZJ2I3KGyqovMf6RnwSvVkcLf7sQtWKCsFlxddehl pW3hIIFO0pZGMS4GGTFFFli1eQUhIz9r5tV2sXCzGFlAhnCwMUpABNh5mZkmPAyYO6z1V/3LFv4 b/tbpyOn74gcNeb9MGuplAKXTKO24ExGhhkOwVcentn6oVNi2oUJF/6uVKxrF2BoWOu+zl1in84 RW0YA X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Marc Kleine-Budde A SPI transfer defines the _maximum_ speed of the SPI transfer. However the driver doesn't take into account that the clock divider is always rounded down (due to integer arithmetic). This results in a too high clock rate for the SPI transfer. E.g.: with an mclk_rate of 24 MHz and an SPI transfer speed of 10 MHz, the original code calculates a reg of "0", which results in an effective divider of "2" and a 12 MHz clock for the SPI transfer. Use DIV_ROUND_UP() instead of a plain integer division to fix the problem. While there simplify the divider calculation for the CDR1 case, use order_base_2() instead of two ilog2() calculations. Fixes: b5f6517948cc ("spi: sunxi: Add Allwinner A10 SPI controller driver") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 3649bcabcc9a..8a9dcd3b6b8f 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -212,7 +212,7 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, struct spi_transfer *tfr) { struct sun4i_spi *sspi = spi_controller_get_devdata(host); - unsigned int mclk_rate, div; + unsigned int mclk_rate, div, div_cdr1, div_cdr2; unsigned long time_left; unsigned int start, end, tx_time; unsigned int tx_len = 0; @@ -296,15 +296,13 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div = mclk_rate / (2 * tfr->speed_hz); - if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { - if (div > 0) - div--; - - reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; + div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz); + div_cdr2 = DIV_ROUND_UP(div_cdr1, 2); + if (div_cdr2 <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { + reg = SUN4I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN4I_CLK_CTL_DRS; } else { - div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); - reg = SUN4I_CLK_CTL_CDR1(div); + div = min(SUN4I_CLK_CTL_CDR1_MASK + 1, order_base_2(div_cdr1)); + reg = SUN4I_CLK_CTL_CDR1(div - 1); } sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg); From patchwork Mon Sep 14 15:35:58 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Rebmann X-Patchwork-Id: 3335 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id 636DA1C347D for ; Mon, 14 Sep 2026 17:50:47 +0200 (CEST) Authentication-Results: mxe881; spf=pass (sender IP is 172.232.135.74) smtp.mailfrom=linux-sunxi+bounces-25900-noreply=patchwork.local@lists.linux.dev smtp.helo=sto.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.232.135.74 as permitted sender) client-ip=172.232.135.74; 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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j2-000vXD-0g; Mon, 14 Sep 2026 17:36:08 +0200 From: Jonas Rebmann Date: Mon, 14 Sep 2026 17:35:58 +0200 Subject: [PATCH v3 4/6] spi: spi-sun4i: sun4i_spi_handler(): fix race condition between transfer completion and RX FIFO interrupt Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260914-spi-sun4i-fixes-v3-4-9fe919d5cecf@pengutronix.de> References: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> In-Reply-To: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann , Tobias Schramm X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=4123; i=jre@pengutronix.de; h=from:subject:message-id; bh=/K4qAJq8Ud8aVtX6R8lXT6nVztdVNYQ6Ssz6Tu/OkLY=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYshaIZKmlZ/9obR7TU3qK4vFn8xzUifbTdj4tPfCndCAb 2vn/wyZ0lHKwiDGxSArpsgSqyanIGTsf92s0i4WZg4rE8gQBi5OAZjICk2Gf3b1Ar4sGdeFuc6r Tzm1ir3jxT9rX71pTm82Lp3hfdBsTzUjw+He0hfsfkqptWItG3dGvA271L3j6pUP28zXr5kad8C iihsA X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Marc Kleine-Budde In commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size"), support for transfers larger than the FIFO size was added. This commit moves the draining of the RX-FIFO from sun4i_spi_transfer_one() (after completion of the transfer) to the IRQ handler when the IRQ "transfer complete" is handled. In addition, the IRQ "RX-FIFO 3/4 full" is activated for all transfers. However, this does not take into account that the RX-IRQ for transfers that exceed 3/4 of the FIFO size is still pending after the IRQ "transfer complete" has been processed. All interrupt sources are only deactivated after the wait_for_completion_timeout() in sun4i_spi_transfer_one(). This opens a race window for "RX-FIFO 3/4 full" interrupts to come. The sequence is as follows: | sun4i_spi_transfer_one() | sun4i_spi_fill_fifo() // fill TX-FIFO with 48 bytes | // enable RX-FIFO 3/4 full IRQ | wait_for_completion_timeout(); | | // SPI controller transfers 48 bytes | // SPI controller issues "transfer complete" and "RX-FIFO 3/4 full" IRQ | | // IRQ handler start | sun4i_spi_handler() | // ACK "transfer complete" IRQ | sun4i_spi_drain_fifo(); | complete(); ----. | return IRQ_HANDLED; \ | // IRQ handler end \__ race | / window | // wait_for_completion_timeout() continues / | // disable all IRQ sources ----' Avoid the race condition by disabling all interrupts when handling the "transfer complete" IRQ and before calling complete(). Also move the draining of the RX-FIFO back into sun4i_spi_transfer_one() where it was before commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size"). This has the added benefit of spending a little less time in the IRQ handler. With all interrupts disabled once the transfer completed, omit the clearing of the Transfer Complete bit in sun4i_spi_handler. This is safe because sun4i_spi_transfer_one() takes care of this before enabling any interrupts again. Cc: Tobias Schramm Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 8a9dcd3b6b8f..ea8be0170fbf 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -82,6 +82,8 @@ struct sun4i_spi { struct completion done; + int irq; + const u8 *tx_buf; u8 *rx_buf; int len; @@ -333,6 +335,7 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, start = jiffies; time_left = wait_for_completion_timeout(&sspi->done, msecs_to_jiffies(tx_time)); + end = jiffies; if (!time_left) { dev_warn(&host->dev, @@ -340,12 +343,11 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, dev_name(&spi->dev), tfr->len, tfr->speed_hz, jiffies_to_msecs(end - start), tx_time); ret = -ETIMEDOUT; - goto out; + sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); + synchronize_irq(sspi->irq); } - -out: - sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); + sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); return ret; } @@ -357,8 +359,7 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id) /* Transfer complete */ if (status & SUN4I_INT_CTL_TC) { - sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TC); - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); + sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); complete(&sspi->done); return IRQ_HANDLED; } @@ -456,6 +457,7 @@ static int sun4i_spi_probe(struct platform_device *pdev) return ret; } + sspi->irq = irq; sspi->host = host; host->max_speed_hz = 100 * 1000 * 1000; host->min_speed_hz = 3 * 1000; From patchwork Mon Sep 14 15:35:59 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Rebmann X-Patchwork-Id: 3336 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114]) by mxe881.netcup.net (Postfix) with ESMTPS id BF4531C0294 for ; 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This might happen if the clock isn't known yet or fails to set the requested rate. This also ensures that mclk_rate is nonzero and can be safely divided by in a future commit. Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index ea8be0170fbf..94e1c7bbd632 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -279,9 +279,17 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, /* Ensure that we have a parent clock fast enough */ mclk_rate = clk_get_rate(sspi->mclk); + if (!mclk_rate) + return -EINVAL; + if (mclk_rate < (2 * tfr->speed_hz)) { - clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); + ret = clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); + if (ret) + return ret; + mclk_rate = clk_get_rate(sspi->mclk); + if (!mclk_rate) + return -EINVAL; } /* From patchwork Mon Sep 14 15:36:00 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Rebmann X-Patchwork-Id: 3337 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4]) by mxe881.netcup.net (Postfix) with ESMTPS id 4D3FB1C454A for ; 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Mon, 14 Sep 2026 17:36:08 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x68j2-000vXD-16; Mon, 14 Sep 2026 17:36:08 +0200 From: Jonas Rebmann Date: Mon, 14 Sep 2026 17:36:00 +0200 Subject: [PATCH v3 6/6] spi: spi-sun4i: sun4i_spi_transfer_one(): report effectively used speed_hz of transfer Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20260914-spi-sun4i-fixes-v3-6-9fe919d5cecf@pengutronix.de> References: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> In-Reply-To: <20260914-spi-sun4i-fixes-v3-0-9fe919d5cecf@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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For more information see commit 5d7e2b5ed585 ("spi: core: allow reporting the effectivly used speed_hz for a transfer"), which adds this feature to the SPI core. Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 94e1c7bbd632..59941b38b757 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -310,9 +310,11 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, div_cdr2 = DIV_ROUND_UP(div_cdr1, 2); if (div_cdr2 <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { reg = SUN4I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN4I_CLK_CTL_DRS; + tfr->effective_speed_hz = mclk_rate / (2 * div_cdr2); } else { div = min(SUN4I_CLK_CTL_CDR1_MASK + 1, order_base_2(div_cdr1)); reg = SUN4I_CLK_CTL_CDR1(div - 1); + tfr->effective_speed_hz = mclk_rate / (1 << div); } sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg);