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Wed, 23 Sep 2026 04:20:12 -0700 (PDT) Received: from DESKTOP-7GRJKK0 ([188.226.104.175]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b8d8595cb6sm516505e87.82.2026.09.23.04.20.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 04:20:11 -0700 (PDT) From: Vladimir To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/2] arm64: dts: allwinner: h616: orangepi-zero2w: add 24-pin expansion overlay Date: Wed, 23 Sep 2026 16:20:07 +0500 Message-ID: <20260923112009.1062-1-anykey196@gmail.com> X-Mailer: git-send-email 2.55.0.windows.3 Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [5.84 / 15.00]; RBL_SENDERSCORE(2.00)[172.232.135.74:from]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; R_MISSING_CHARSET(0.50)[]; MAILLIST(-0.15)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; FROM_HAS_DN(0.00)[]; PRECEDENCE_BULK(0.00)[]; TAGGED_RCPT(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[sto.lore.kernel.org:rdns,sto.lore.kernel.org:helo]; RCVD_COUNT_FIVE(0.00)[6]; FORGED_SENDER_MAILLIST(0.00)[]; FROM_NEQ_ENVFROM(0.00)[anykey196@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26182-noreply=patchwork.local]; ASN(0.00)[asn:63949, ipnet:172.232.128.0/19, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.232.135.74]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[188.226.104.175:received,74.125.229.204:received,100.90.174.1:received]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; RCPT_COUNT_FIVE(0.00)[6]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.232.135.74:from] X-Rspamd-Queue-Id: A88391C11EF X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The optional 24-pin expansion board carries two buttons on LRADC channel 0 and an IR receiver. Keep them out of the base board .dts: with the board detached the LRADC input and the IR receiver pin are not driven and float, which can produce phantom key presses and interrupt storms. Provide them as a devicetree overlay instead, following the existing sun8i-orangepi-zero-interface-board.dtso approach. Tested on: OrangePi Zero 2W (Allwinner H618) with the 24-pin expansion board. Signed-off-by: Vladimir --- arch/arm64/boot/dts/allwinner/Makefile | 2 + .../sun50i-h618-orangepi-zero2w-24pin.dtso | 42 +++++++++++++++++++ 2 files changed, 44 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w-24pin.dtso diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index d1f768dd646..e4576030276 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w-24pin.dtb +sun50i-h618-orangepi-zero2w-24pin-dtbs := sun50i-h618-orangepi-zero2w.dtb sun50i-h618-orangepi-zero2w-24pin.dtbo dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-yuzukihd-chameleon.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w-24pin.dtso b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w-24pin.dtso new file mode 100644 index 00000000000..2d7e98e4b66 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w-24pin.dtso @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR X11) +/* + * Device tree overlay for the Orange Pi Zero 2W 24-pin expansion board. + * + * The expansion board provides two buttons wired to LRADC channel 0 and an + * IR receiver. These are only present when the board is attached, so they + * are deliberately kept out of the base .dts: on a bare board the LRADC + * input and the IR receiver pin are not driven and float, which can cause + * phantom key presses and interrupt storms. + * + * Apply on top of: + * arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts + */ + +/dts-v1/; +/plugin/; + +#include + +&lradc { + vref-supply = <®_vcc3v3>; + status = "okay"; + wakeup-source; + + button-1000 { + label = "KEY_1"; + linux,code = ; + channel = <0>; + voltage = <1000000>; + }; + + button-1600 { + label = "KEY_ENTER"; + linux,code = ; + channel = <0>; + voltage = <1600000>; + }; +}; + +&ir { + status = "okay"; +}; From patchwork Wed Sep 23 11:20:08 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?0JLQu9Cw0LQg0KHQktCd?= X-Patchwork-Id: 3438 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 1DDBB1C03C2 for ; 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Wed, 23 Sep 2026 04:20:13 -0700 (PDT) Received: from DESKTOP-7GRJKK0 ([188.226.104.175]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b8d8595cb6sm516505e87.82.2026.09.23.04.20.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 04:20:12 -0700 (PDT) From: Vladimir To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v3 2/2] arm64: dts: allwinner: h616: orangepi-zero2w: add SDIO WiFi/BT (AW859A) Date: Wed, 23 Sep 2026 16:20:08 +0500 Message-ID: <20260923112009.1062-2-anykey196@gmail.com> X-Mailer: git-send-email 2.55.0.windows.3 In-Reply-To: <20260923112009.1062-1-anykey196@gmail.com> References: <20260923112009.1062-1-anykey196@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= Enable the SDIO bus (mmc1) and power the on-board AW859A (UWE5622) WiFi/BT combo through an mmc-pwrseq-simple that resets WL_REG_ON (PG18) and gates the RTC 32 kHz fanout clock (PG10), with the 3.3 V and 1.8 V supplies. The pwrseq clock must be named "ext_clock" (what mmc-pwrseq-simple requests) and its output pin must be muxed to the clock function, as done for the other H616/H618 boards. Tested on: OrangePi Zero 2W (Allwinner H618) with the out-of-tree uwe5622 driver. Signed-off-by: Vladimir --- .../allwinner/sun50i-h618-orangepi-zero2w.dts | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts index ff9b40352a5..39f580af15b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts @@ -189,3 +189,45 @@ &usbphy { usb1_vbus-supply = <®_vcc5v>; status = "okay"; }; + +/ { + reg_vcc33_wifi: vcc33-wifi { + /* Always-on 3.3V regulator for WiFi and BT */ + compatible = "regulator-fixed"; + regulator-name = "vcc33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_vcc5v>; + }; + + reg_vcc_wifi_io: vcc-wifi-io { + /* Always-on 1.8V regulator for WiFi and BT IO */ + compatible = "regulator-fixed"; + regulator-name = "vcc-wifi-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_vcc33_wifi>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&x32clk_fanout_pin>; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + post-power-on-delay-ms = <200>; + }; +}; + +&mmc1 { + vmmc-supply = <®_vcc33_wifi>; + vqmmc-supply = <®_vcc_wifi_io>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + mmc-ddr-1_8v; + status = "okay"; +};