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([179.179.237.181]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-677c1b1b585sm3449969d50.5.2026.10.05.10.26.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 10:26:04 -0700 (PDT) From: Vinicius Pedrosa To: linux-serial@vger.kernel.org Cc: gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Enzo Adriano , stable@vger.kernel.org Subject: [PATCH 1/3] serial: 8250_dw: Keep the BUSY-safe divisor hook when DLF is present Date: Mon, 5 Oct 2026 14:25:36 -0300 Message-ID: <20261005172538.398522-2-vinicius.eduardo.pedrosa@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> References: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; R_MISSING_CHARSET(0.50)[]; MAILLIST(-0.15)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; PRECEDENCE_BULK(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; TAGGED_RCPT(0.00)[dt]; RCPT_COUNT_TWELVE(0.00)[13]; DBL_BLOCKED_OPENRESOLVER(0.00)[tor.lore.kernel.org:rdns,tor.lore.kernel.org:helo]; FROM_HAS_DN(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; FREEMAIL_CC(0.00)[linuxfoundation.org,kernel.org,linux.intel.com,vger.kernel.org,lists.linux.dev,gmail.com]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_NEQ_ENVFROM(0.00)[viniciuseduardopedrosa@gmail.com,linux-sunxi@lists.linux.dev]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.90.174.1:received]; RCVD_COUNT_FIVE(0.00)[6]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MIME_TRACE(0.00)[0:+]; TAGGED_FROM(0.00)[bounces-26507-noreply=patchwork.local]; RECEIVED_SPAMHAUS_PBL(0.00)[179.179.237.181:received]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.105.105.114:from] X-Rspamd-Queue-Id: 2BF1B1C01E3 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= dw8250_probe() installs dw8250_set_divisor(), which brackets the DLAB/DLL/DLH sequence with dw8250_idle_enter()/dw8250_idle_exit() so that a BUSY UART cannot drop the divisor LCR write. dw8250_setup_port() runs afterwards and replaces that hook with the dwlib one whenever it detects a DLF register. The dwlib hook programs the divisor through serial8250_do_set_divisor() without entering idle. When termios changes while the UART is transmitting, the LCR|DLAB write is ignored and dw8250_check_lcr() retries it between dw8250_idle_enter() and dw8250_idle_exit(). dw8250_idle_exit() restores IER while DLAB is still set, so the value lands in DLH. The real IER keeps the zero written by dw8250_idle_enter(), and the port gets no further TX or RX interrupts while up->ier says they're enabled. Program DLF from dw8250_set_divisor() inside the idle section and keep that hook after dw8250_setup_port(). Observed on an Allwinner A733 (Radxa Cubie A7Z): the first interactive tcsetattr() during console output left hardware IER at 0 and up->ier at 0x07. The shell never printed its prompt or read input. With this change alone the same boot reached the prompt and echoed input, and hardware IER matched up->ier afterwards. Fixes: a7b9ce39fbe4 ("serial: 8250_dw: Ensure BUSY is deasserted") Cc: stable@vger.kernel.org Signed-off-by: Vinicius Pedrosa --- The A733 has no real DLF. Offset 0xc0 is an RS485 control register that dw8250_setup_port() mistakes for one (patch 3), which is how this path was reached. The new DLF write hasn't been tested on a UART with a real DLF register. drivers/tty/serial/8250/8250_dw.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 0ab558230370..ba414306c98a 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -189,6 +189,7 @@ static int dw8250_idle_enter(struct uart_port *p) static void dw8250_set_divisor(struct uart_port *p, unsigned int baud, unsigned int quot, unsigned int quot_frac) { + struct dw8250_data *d = to_dw8250_data(p->private_data); struct uart_8250_port *up = up_to_u8250p(p); int ret; @@ -196,6 +197,9 @@ static void dw8250_set_divisor(struct uart_port *p, unsigned int baud, if (ret < 0) return; + if (d->data.dlf_size) + dw8250_writel_ext(p, DW_UART_DLF, quot_frac); + serial_port_out(p, UART_LCR, up->lcr | UART_LCR_DLAB); if (!(serial_port_in(p, UART_LCR) & UART_LCR_DLAB)) goto idle_failed; @@ -650,7 +654,6 @@ static int dw8250_probe(struct platform_device *pdev) p->set_ldisc = dw8250_set_ldisc; p->set_termios = dw8250_set_termios; - p->set_divisor = dw8250_set_divisor; data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) @@ -767,6 +770,13 @@ static int dw8250_probe(struct platform_device *pdev) if (!data->skip_autocfg) dw8250_setup_port(p); + /* + * dw8250_setup_port() installs the library divisor hook when it finds + * DLF. Keep the BUSY-safe hook instead: it also programs DLF, and it + * must own DLAB so that a BUSY UART never drops the divisor LCR write. + */ + p->set_divisor = dw8250_set_divisor; + /* If we have a valid fifosize, try hooking up DMA */ if (p->fifosize) { data->data.dma.rxconf.src_maxburst = p->fifosize / 4; From patchwork Mon Oct 5 17:25:37 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinicius Pedrosa X-Patchwork-Id: 3561 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id A665F1C2C5A for ; Mon, 5 Oct 2026 19:40:17 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=gmail.com; spf=pass (sender IP is 172.232.135.74) smtp.mailfrom=linux-sunxi+bounces-26508-noreply=patchwork.local@lists.linux.dev smtp.helo=sto.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.232.135.74 as permitted sender) client-ip=172.232.135.74; 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([179.179.237.181]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-677c1b1b585sm3449969d50.5.2026.10.05.10.26.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 10:26:13 -0700 (PDT) From: Vinicius Pedrosa To: linux-serial@vger.kernel.org Cc: gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Enzo Adriano Subject: [PATCH 2/3] dt-bindings: serial: snps-dw-apb-uart: Add Allwinner A733 Date: Mon, 5 Oct 2026 14:25:37 -0300 Message-ID: <20261005172538.398522-3-vinicius.eduardo.pedrosa@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> References: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [4.84 / 15.00]; RBL_SENDERSCORE(2.00)[172.232.135.74:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; R_MISSING_CHARSET(0.50)[]; MAILLIST(-0.15)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; DBL_BLOCKED_OPENRESOLVER(0.00)[sto.lore.kernel.org:rdns,sto.lore.kernel.org:helo]; FROM_HAS_DN(0.00)[]; PRECEDENCE_BULK(0.00)[]; TAGGED_RCPT(0.00)[dt]; FORGED_SENDER_MAILLIST(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; FREEMAIL_CC(0.00)[linuxfoundation.org,kernel.org,linux.intel.com,vger.kernel.org,lists.linux.dev,gmail.com]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[viniciuseduardopedrosa@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26508-noreply=patchwork.local]; TO_DN_SOME(0.00)[]; FREEMAIL_FROM(0.00)[gmail.com]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.90.174.1:received,74.125.224.140:received]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.232.135.74:from]; ASN(0.00)[asn:63949, ipnet:172.232.128.0/19, country:SG]; R_SPF_ALLOW(0.00)[+ip4:172.232.135.74]; RECEIVED_SPAMHAUS_PBL(0.00)[179.179.237.181:received]; MID_RHS_MATCH_FROM(0.00)[]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: A665F1C2C5A X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The Allwinner A733 UART is a DesignWare APB UART with two SoC-specific differences. Its baud clock is the bus clock gate, which can't change rate, and offset 0xc0 holds an RS485 control register instead of DLF. Add a SoC-specific compatible, with "snps,dw-apb-uart" as the fallback. Signed-off-by: Vinicius Pedrosa Acked-by: Conor Dooley --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 86dc25919311..aa8cab5ba3d3 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -51,6 +51,7 @@ properties: - const: renesas,rzn1-uart - items: - enum: + - allwinner,sun60i-a733-uart - anlogic,dr1v90-uart - brcm,bcm11351-dw-apb-uart - brcm,bcm21664-dw-apb-uart From patchwork Mon Oct 5 17:25:38 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinicius Pedrosa X-Patchwork-Id: 3563 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74]) by mxe881.netcup.net (Postfix) with ESMTPS id AFEC01C01E3 for ; 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([179.179.237.181]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-677c1b1b585sm3449969d50.5.2026.10.05.10.26.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 10:26:21 -0700 (PDT) From: Vinicius Pedrosa To: linux-serial@vger.kernel.org Cc: gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Enzo Adriano Subject: [PATCH 3/3] serial: 8250_dw: Add Allwinner A733 UART Date: Mon, 5 Oct 2026 14:25:38 -0300 Message-ID: <20261005172538.398522-4-vinicius.eduardo.pedrosa@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> References: <20261005172538.398522-1-vinicius.eduardo.pedrosa@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.232.135.74:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; R_MISSING_CHARSET(0.50)[]; MAILLIST(-0.15)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; FORGED_SENDER_MAILLIST(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc-20240116:i=1]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; PRECEDENCE_BULK(0.00)[]; FREEMAIL_CC(0.00)[linuxfoundation.org,kernel.org,linux.intel.com,vger.kernel.org,lists.linux.dev,gmail.com]; TAGGED_RCPT(0.00)[dt]; DBL_BLOCKED_OPENRESOLVER(0.00)[sto.lore.kernel.org:rdns,sto.lore.kernel.org:helo]; FROM_NEQ_ENVFROM(0.00)[viniciuseduardopedrosa@gmail.com,linux-sunxi@lists.linux.dev]; ASN(0.00)[asn:63949, ipnet:172.232.128.0/19, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.232.135.74]; TO_DN_SOME(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.232.135.74:from]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.90.174.1:received]; RCVD_COUNT_FIVE(0.00)[6]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MIME_TRACE(0.00)[0:+]; TAGGED_FROM(0.00)[bounces-26509-noreply=patchwork.local]; RECEIVED_SPAMHAUS_PBL(0.00)[179.179.237.181:received]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: AFEC01C01E3 X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The A733 UART is clocked from its bus clock gate, which can't change rate. dw8250_set_termios() still gates it around a no-op clk_set_rate() on every termios change. That stalls the character being shifted out and corrupts it on the wire. Use the existing SKIP_SET_RATE quirk, as other SoCs with a fixed UART clock do. Offset 0xc0 is the RS485 control register on this SoC (A733 User Manual, UART_485_CTL), not DLF. dw8250_setup_port() writes all ones there, reads back a nonzero 9-bit value and takes it for a 9-bit DLF. Every later divisor change then writes the fractional divisor into the RS485 control register. Add a NO_DLF quirk so dwlib skips that probe. Signed-off-by: Vinicius Pedrosa --- drivers/tty/serial/8250/8250_dw.c | 13 +++++++++++++ drivers/tty/serial/8250/8250_dwlib.c | 22 ++++++++++++---------- drivers/tty/serial/8250/8250_dwlib.h | 1 + 3 files changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index ba414306c98a..ea33aa644cda 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -52,6 +52,7 @@ #define DW_UART_QUIRK_CPR_VALUE BIT(5) #define DW_UART_QUIRK_IER_KICK BIT(6) #define DW_UART_QUIRK_SKIP_EMPTY_FIFO_READ BIT(7) +#define DW_UART_QUIRK_NO_DLF BIT(8) /* * Number of consecutive IIR_NO_INT interrupts required to trigger interrupt @@ -606,6 +607,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_out38x; if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) p->set_termios = dw8250_do_set_termios; + if (quirks & DW_UART_QUIRK_NO_DLF) + data->data.no_dlf = true; if (quirks & DW_UART_QUIRK_IS_DMA_FC) { data->data.dma.txconf.device_fc = 1; data->data.dma.rxconf.device_fc = 1; @@ -892,6 +895,15 @@ static const struct dw8250_platform_data dw8250_skip_set_rate_data = { .quirks = DW_UART_QUIRK_SKIP_SET_RATE, }; +/* + * The baud clock is the bus clock gate, whose rate cannot change, and offset + * 0xc0 is the RS485 control register rather than DLF. + */ +static const struct dw8250_platform_data dw8250_sun60i_a733_data = { + .usr_reg = DW_UART_USR, + .quirks = DW_UART_QUIRK_SKIP_SET_RATE | DW_UART_QUIRK_NO_DLF, +}; + static const struct dw8250_platform_data dw8250_intc10ee = { .usr_reg = DW_UART_USR, .quirks = DW_UART_QUIRK_IER_KICK, @@ -913,6 +925,7 @@ static const struct dw8250_platform_data dw8250_tda54 = { static const struct of_device_id dw8250_of_match[] = { { .compatible = "snps,dw-apb-uart", .data = &dw8250_dw_apb }, + { .compatible = "allwinner,sun60i-a733-uart", .data = &dw8250_sun60i_a733_data }, { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 9bb02a4ab11f..9c6f3d926ad5 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -209,16 +209,18 @@ void dw8250_setup_port(struct uart_port *p) } up->capabilities |= UART_CAP_NOTEMT; - /* Preserve value written by firmware or bootloader */ - old_dlf = dw8250_readl_ext(p, DW_UART_DLF); - dw8250_writel_ext(p, DW_UART_DLF, ~0U); - reg = dw8250_readl_ext(p, DW_UART_DLF); - dw8250_writel_ext(p, DW_UART_DLF, old_dlf); - - if (reg) { - pd->dlf_size = fls(reg); - p->get_divisor = dw8250_get_divisor; - p->set_divisor = dw8250_set_divisor; + if (!pd->no_dlf) { + /* Preserve value written by firmware or bootloader */ + old_dlf = dw8250_readl_ext(p, DW_UART_DLF); + dw8250_writel_ext(p, DW_UART_DLF, ~0U); + reg = dw8250_readl_ext(p, DW_UART_DLF); + dw8250_writel_ext(p, DW_UART_DLF, old_dlf); + + if (reg) { + pd->dlf_size = fls(reg); + p->get_divisor = dw8250_get_divisor; + p->set_divisor = dw8250_set_divisor; + } } reg = dw8250_readl_ext(p, DW_UART_UCV); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index ee7a07fac0f6..ca0dfd6d056e 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -88,6 +88,7 @@ struct dw8250_port_data { /* Hardware configuration */ u32 cpr_value; u8 dlf_size; + bool no_dlf; /* Offset 0xc0 is not DLF */ /* RS485 variables */ bool hw_rs485_support;