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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.14.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:14:58 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:52 -0600 Subject: [PATCH 1/6] dmaengine: sun6i: fix physical channel index in interrupt handler X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-1-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard , stable@vger.kernel.org, Frank Li X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [4.31 / 15.00]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; TAGGED_RCPT(0.00)[]; FROM_HAS_DN(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_TWELVE(0.00)[19]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com,nxp.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[nxp.com:email,tor.lore.kernel.org:helo,tor.lore.kernel.org:rdns,kylinos.cn:email]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26807-noreply=patchwork.local]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.77.114.92:received,174.29.1.49:received]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; MIME_TRACE(0.00)[0:+]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.105.105.114:from] X-Rspamd-Queue-Id: 2740E1C00DD X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= From: Hongling Zeng The interrupt handler iterates over register banks in the outer loop, but the physical channel lookup uses only the inner loop index. It therefore handles every bank as if it belonged to the first channels. For controllers with eight channels per bank, interrupts from channels 8 and above are routed to channels 0-7. On A733, each bank covers one channel, so every interrupt is routed to channel 0. This can falsely complete descriptors for unrelated channels and corrupt their data. Use the absolute channel index, calculated from the bank number and the controller's configured number of channels per bank. Fixes: 555859308723 ("dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller") Cc: stable@vger.kernel.org Signed-off-by: Hongling Zeng Reviewed-by: Frank Li [james: use the configured bank size and describe the A733 case] Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 8752969366ff..9d94a37fcf10 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -603,7 +603,7 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) sun6i_write_irq_stat(sdev, i, status); for (j = 0; (j < sdev->cfg->num_channels_per_reg) && status; j++) { - pchan = sdev->pchans + j; + pchan = sdev->pchans + i * sdev->cfg->num_channels_per_reg + j; vchan = pchan->vchan; if (vchan && (status & vchan->irq_type)) { if (vchan->cyclic) { From patchwork Fri Oct 23 03:14:53 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hilliard X-Patchwork-Id: 3697 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id C644B1C00DD for ; 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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.14.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:14:59 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:53 -0600 Subject: [PATCH 2/6] dmaengine: sun6i: handle the last partial interrupt bank X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-2-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard , Sashiko X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.19 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; FROM_HAS_DN(0.00)[]; TAGGED_RCPT(0.00)[]; RCPT_COUNT_TWELVE(0.00)[18]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com,kernel.org]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:helo,sea.lore.kernel.org:rdns]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[174.29.1.49:received,100.77.114.92:received]; RCVD_COUNT_FIVE(0.00)[6]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; MIME_TRACE(0.00)[0:+]; TAGGED_FROM(0.00)[bounces-26808-noreply=patchwork.local]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.234.253.10:from] X-Rspamd-Queue-Id: C644B1C00DD X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The number of physical channels need not be a multiple of the number covered by an interrupt-status register. H3 has twelve channels and eight channels per bank. Rounding down the number of banks leaves its channels 8 through 11 without completion handling. Round up the number of banks to visit, and stop processing the last bank at num_pchans so unused status bits cannot index past the physical-channel array. Use the controller's configured bank size for both limits and the physical-channel index. Fixes: f008db8c00c1 ("dmaengine: sun6i: Add support for Allwinner H3 (sun8i) variant") Reported-by: Sashiko Closes: https://lore.kernel.org/r/20260706065650.34B131F00A3A@smtp.kernel.org Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 9d94a37fcf10..0a9645171180 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -587,12 +587,13 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) { struct sun6i_dma_dev *sdev = dev_id; + u32 channels_per_reg = sdev->cfg->num_channels_per_reg; struct sun6i_vchan *vchan; struct sun6i_pchan *pchan; int i, j, ret = IRQ_NONE; u32 status; - for (i = 0; i < sdev->num_pchans / sdev->cfg->num_channels_per_reg; i++) { + for (i = 0; i < DIV_ROUND_UP(sdev->num_pchans, channels_per_reg); i++) { status = sun6i_read_irq_stat(sdev, i); if (!status) continue; @@ -602,8 +603,9 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) sun6i_write_irq_stat(sdev, i, status); - for (j = 0; (j < sdev->cfg->num_channels_per_reg) && status; j++) { - pchan = sdev->pchans + i * sdev->cfg->num_channels_per_reg + j; + for (j = 0; j < channels_per_reg && + i * channels_per_reg + j < sdev->num_pchans && status; j++) { + pchan = sdev->pchans + i * channels_per_reg + j; vchan = pchan->vchan; if (vchan && (status & vchan->irq_type)) { if (vchan->cyclic) { From patchwork Fri Oct 23 03:14:54 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hilliard X-Patchwork-Id: 3696 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114]) by mxe881.netcup.net (Postfix) with ESMTPS id D7D1E1C00DD for ; Fri, 23 Oct 2026 05:15:16 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=gmail.com; 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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.15.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:15:01 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:54 -0600 Subject: [PATCH 3/6] dmaengine: sun6i: serialize channel reassignment with interrupt handling X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-3-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard , Sashiko X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.19 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[tor.lore.kernel.org:helo,tor.lore.kernel.org:rdns]; FROM_HAS_DN(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; RCPT_COUNT_TWELVE(0.00)[18]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com,kernel.org]; TAGGED_RCPT(0.00)[]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26810-noreply=patchwork.local]; TO_DN_SOME(0.00)[]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114:c]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[174.29.1.49:received,100.77.114.92:received]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.105.105.114:from]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: D7D1E1C00DD X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The allocator changes vchan->phy and pchan->vchan under sdev->lock, but termination reads the physical channel before taking either lock. The IRQ handler also takes an owner snapshot without protecting it. Termination can therefore miss a new assignment or detach an owner while an interrupt is about to complete its descriptor. An IRQ status snapshot can survive reassignment and be applied to the next transfer. Use sdev->lock for physical-channel ownership, pending channels and the shared interrupt registers, nesting vc.lock inside it for descriptor lists and cookie updates. Allocate and start each pending channel in one critical section. Read and acknowledge IRQ status under the same outer lock, and protect cyclic notifications as well as ordinary completions. Mask and clear a stopped channel's IRQs before releasing its ownership, and clear pending status before starting a new descriptor. Schedule the allocator after termination so other pending channels can use the released physical channel without depending on another device interrupt. This also keeps process-context acquisitions IRQ-safe. Client callbacks remain outside these locks in the virtual-channel completion tasklet. Fixes: 555859308723 ("dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller") Reported-by: Sashiko Closes: https://lore.kernel.org/r/20260706065650.34B131F00A3A@smtp.kernel.org Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 101 +++++++++++++++++++++++++++--------------------- 1 file changed, 56 insertions(+), 45 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 0a9645171180..cd0562de7def 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -217,6 +217,7 @@ struct sun6i_dma_dev { struct clk *clk; struct clk *clk_mbus; int irq; + /* Channel assignment and register access; nests outside vc.lock. */ spinlock_t lock; struct reset_control *rstc; struct tasklet_struct task; @@ -502,6 +503,11 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vchan) irq_reg = pchan->idx / sdev->cfg->num_channels_per_reg; irq_offset = pchan->idx % sdev->cfg->num_channels_per_reg; + /* Do not deliver a previous transfer's interrupt to this descriptor. */ + sun6i_write_irq_stat(sdev, irq_reg, + (DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << + (irq_offset * DMA_IRQ_CHAN_WIDTH)); + vchan->irq_type = vchan->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; irq_val = sun6i_read_irq_en(sdev, irq_reg); @@ -524,11 +530,11 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) struct sun6i_dma_dev *sdev = from_tasklet(sdev, t, task); struct sun6i_vchan *vchan; struct sun6i_pchan *pchan; - unsigned int pchan_alloc = 0; unsigned int pchan_idx; + spin_lock_irq(&sdev->lock); list_for_each_entry(vchan, &sdev->slave.channels, vc.chan.device_node) { - spin_lock_irq(&vchan->vc.lock); + spin_lock(&vchan->vc.lock); pchan = vchan->phy; @@ -545,10 +551,9 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) pchan->vchan = NULL; } } - spin_unlock_irq(&vchan->vc.lock); + spin_unlock(&vchan->vc.lock); } - spin_lock_irq(&sdev->lock); for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { pchan = &sdev->pchans[pchan_idx]; @@ -557,31 +562,20 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) vchan = list_first_entry(&sdev->pending, struct sun6i_vchan, node); + spin_lock(&vchan->vc.lock); /* Remove from pending channels */ list_del_init(&vchan->node); - pchan_alloc |= BIT(pchan_idx); /* Mark this channel allocated */ pchan->vchan = vchan; vchan->phy = pchan; dev_dbg(sdev->slave.dev, "pchan %u: alloc vchan %p\n", pchan->idx, &vchan->vc); + sun6i_dma_start_desc(vchan); + spin_unlock(&vchan->vc.lock); } spin_unlock_irq(&sdev->lock); - - for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { - if (!(pchan_alloc & BIT(pchan_idx))) - continue; - - pchan = sdev->pchans + pchan_idx; - vchan = pchan->vchan; - if (vchan) { - spin_lock_irq(&vchan->vc.lock); - sun6i_dma_start_desc(vchan); - spin_unlock_irq(&vchan->vc.lock); - } - } } static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) @@ -590,9 +584,11 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) u32 channels_per_reg = sdev->cfg->num_channels_per_reg; struct sun6i_vchan *vchan; struct sun6i_pchan *pchan; + unsigned long flags; int i, j, ret = IRQ_NONE; u32 status; + spin_lock_irqsave(&sdev->lock, flags); for (i = 0; i < DIV_ROUND_UP(sdev->num_pchans, channels_per_reg); i++) { status = sun6i_read_irq_stat(sdev, i); if (!status) @@ -608,14 +604,14 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) pchan = sdev->pchans + i * channels_per_reg + j; vchan = pchan->vchan; if (vchan && (status & vchan->irq_type)) { + spin_lock(&vchan->vc.lock); if (vchan->cyclic) { vchan_cyclic_callback(&pchan->desc->vd); } else { - spin_lock(&vchan->vc.lock); vchan_cookie_complete(&pchan->desc->vd); pchan->done = pchan->desc; - spin_unlock(&vchan->vc.lock); } + spin_unlock(&vchan->vc.lock); } status = status >> DMA_IRQ_CHAN_WIDTH; @@ -625,6 +621,7 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) tasklet_schedule(&sdev->task); ret = IRQ_HANDLED; } + spin_unlock_irqrestore(&sdev->lock, flags); return ret; } @@ -931,19 +928,20 @@ static int sun6i_dma_pause(struct dma_chan *chan) { struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); struct sun6i_vchan *vchan = to_sun6i_vchan(chan); - struct sun6i_pchan *pchan = vchan->phy; + struct sun6i_pchan *pchan; unsigned long flags; dev_dbg(dmaengine_chan_dev(chan), "vchan %p: pause\n", &vchan->vc); + spin_lock_irqsave(&sdev->lock, flags); + pchan = vchan->phy; if (pchan) { writel(DMA_CHAN_PAUSE_PAUSE, pchan->base + DMA_CHAN_PAUSE); } else { - spin_lock_irqsave(&sdev->lock, flags); list_del_init(&vchan->node); - spin_unlock_irqrestore(&sdev->lock, flags); } + spin_unlock_irqrestore(&sdev->lock, flags); return 0; } @@ -952,23 +950,24 @@ static int sun6i_dma_resume(struct dma_chan *chan) { struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); struct sun6i_vchan *vchan = to_sun6i_vchan(chan); - struct sun6i_pchan *pchan = vchan->phy; + struct sun6i_pchan *pchan; unsigned long flags; dev_dbg(dmaengine_chan_dev(chan), "vchan %p: resume\n", &vchan->vc); - spin_lock_irqsave(&vchan->vc.lock, flags); + spin_lock_irqsave(&sdev->lock, flags); + spin_lock(&vchan->vc.lock); + pchan = vchan->phy; if (pchan) { writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); } else if (!list_empty(&vchan->vc.desc_issued)) { - spin_lock(&sdev->lock); list_add_tail(&vchan->node, &sdev->pending); - spin_unlock(&sdev->lock); } - spin_unlock_irqrestore(&vchan->vc.lock, flags); + spin_unlock(&vchan->vc.lock); + spin_unlock_irqrestore(&sdev->lock, flags); return 0; } @@ -977,15 +976,15 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) { struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); struct sun6i_vchan *vchan = to_sun6i_vchan(chan); - struct sun6i_pchan *pchan = vchan->phy; + struct sun6i_pchan *pchan; + u32 irq_reg, irq_shift, irq_mask; unsigned long flags; LIST_HEAD(head); spin_lock_irqsave(&sdev->lock, flags); + spin_lock(&vchan->vc.lock); + pchan = vchan->phy; list_del_init(&vchan->node); - spin_unlock_irqrestore(&sdev->lock, flags); - - spin_lock_irqsave(&vchan->vc.lock, flags); if (pchan && pchan->desc && pchan->desc != pchan->done) { struct virt_dma_desc *vd = &pchan->desc->vd; @@ -1000,15 +999,26 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) writel(DMA_CHAN_ENABLE_STOP, pchan->base + DMA_CHAN_ENABLE); writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); + irq_reg = pchan->idx / sdev->cfg->num_channels_per_reg; + irq_shift = (pchan->idx % sdev->cfg->num_channels_per_reg) * + DMA_IRQ_CHAN_WIDTH; + irq_mask = (DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << irq_shift; + sun6i_write_irq_en(sdev, irq_reg, + sun6i_read_irq_en(sdev, irq_reg) & ~irq_mask); + sun6i_write_irq_stat(sdev, irq_reg, irq_mask); + vchan->phy = NULL; pchan->vchan = NULL; pchan->desc = NULL; pchan->done = NULL; } - spin_unlock_irqrestore(&vchan->vc.lock, flags); + spin_unlock(&vchan->vc.lock); + spin_unlock_irqrestore(&sdev->lock, flags); vchan_dma_desc_free_list(&vchan->vc, &head); + if (!atomic_read(&sdev->tasklet_shutdown)) + tasklet_schedule(&sdev->task); return 0; } @@ -1017,8 +1027,9 @@ static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *state) { + struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); struct sun6i_vchan *vchan = to_sun6i_vchan(chan); - struct sun6i_pchan *pchan = vchan->phy; + struct sun6i_pchan *pchan; struct sun6i_dma_lli *lli; struct virt_dma_desc *vd; struct sun6i_desc *txd; @@ -1026,11 +1037,12 @@ static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan, unsigned long flags; size_t bytes = 0; + spin_lock_irqsave(&sdev->lock, flags); + spin_lock(&vchan->vc.lock); ret = dma_cookie_status(chan, cookie, state); if (ret == DMA_COMPLETE || !state) - return ret; - - spin_lock_irqsave(&vchan->vc.lock, flags); + goto out; + pchan = vchan->phy; vd = vchan_find_desc(&vchan->vc, cookie); txd = to_sun6i_desc(&vd->tx); @@ -1044,9 +1056,10 @@ static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan, bytes = sun6i_get_chan_size(pchan); } - spin_unlock_irqrestore(&vchan->vc.lock, flags); - dma_set_residue(state, bytes); +out: + spin_unlock(&vchan->vc.lock); + spin_unlock_irqrestore(&sdev->lock, flags); return ret; } @@ -1057,25 +1070,23 @@ static void sun6i_dma_issue_pending(struct dma_chan *chan) struct sun6i_vchan *vchan = to_sun6i_vchan(chan); unsigned long flags; - spin_lock_irqsave(&vchan->vc.lock, flags); + spin_lock_irqsave(&sdev->lock, flags); + spin_lock(&vchan->vc.lock); if (vchan_issue_pending(&vchan->vc)) { - spin_lock(&sdev->lock); - if (!vchan->phy && list_empty(&vchan->node)) { list_add_tail(&vchan->node, &sdev->pending); tasklet_schedule(&sdev->task); dev_dbg(dmaengine_chan_dev(chan), "vchan %p: issued\n", &vchan->vc); } - - spin_unlock(&sdev->lock); } else { dev_dbg(dmaengine_chan_dev(chan), "vchan %p: nothing to issue\n", &vchan->vc); } - spin_unlock_irqrestore(&vchan->vc.lock, flags); + spin_unlock(&vchan->vc.lock); + spin_unlock_irqrestore(&sdev->lock, flags); } static void sun6i_dma_free_chan_resources(struct dma_chan *chan) From patchwork Fri Oct 23 03:14:55 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hilliard X-Patchwork-Id: 3695 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114]) by mxe881.netcup.net (Postfix) with ESMTPS id 5272D1C081C for ; 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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.15.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:15:02 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:55 -0600 Subject: [PATCH 4/6] dmaengine: sun6i: track paused virtual channels X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-4-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.19 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.105.105.114:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; BAD_REP_POLICIES(0.10)[]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; FROM_HAS_DN(0.00)[]; TAGGED_RCPT(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[tor.lore.kernel.org:helo,tor.lore.kernel.org:rdns]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; ASN(0.00)[asn:63949, ipnet:172.105.96.0/20, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; R_SPF_ALLOW(0.00)[+ip4:172.105.105.114]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[174.29.1.49:received,100.77.114.92:received,209.85.210.47:received]; RCVD_COUNT_FIVE(0.00)[6]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; MIME_TRACE(0.00)[0:+]; TAGGED_FROM(0.00)[bounces-26809-noreply=patchwork.local]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_TLS_LAST(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.105.105.114:from] X-Rspamd-Queue-Id: 5272D1C081C X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= sun6i_dma_tx_status() only returns the cookie state, so a paused but incomplete transfer is reported as DMA_IN_PROGRESS. The 8250 RX flush path pauses the channel and calls its completion helper before terminating it. That helper ignores an in-progress transfer to avoid consuming a new RX operation. With sun6i it consequently drops the partial buffer and leaves rx_running set, preventing another receive from being submitted. Track pause state under the channel-assignment lock and report DMA_PAUSED for incomplete cookies, including status queries without a residue output. Flush the hardware pause request before returning. Completed cookies remain DMA_COMPLETE. Keep paused channels out of the pending queue and do not start a queued descriptor when a paused channel's previous descriptor completes. Resume requeues an unassigned channel only once and schedules the allocator, so an idle controller does not require an unrelated completion to resume it. Clear the pause state when terminating the channel. Fixes: 555859308723 ("dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller") Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index cd0562de7def..7ac6693a041e 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -209,6 +209,7 @@ struct sun6i_vchan { u8 port; u8 irq_type; bool cyclic; + bool paused; }; struct sun6i_dma_dev { @@ -538,7 +539,7 @@ static void sun6i_dma_tasklet(struct tasklet_struct *t) pchan = vchan->phy; - if (pchan && pchan->done) { + if (pchan && pchan->done && !vchan->paused) { if (sun6i_dma_start_desc(vchan)) { /* * No current txd associated with this channel @@ -934,10 +935,12 @@ static int sun6i_dma_pause(struct dma_chan *chan) dev_dbg(dmaengine_chan_dev(chan), "vchan %p: pause\n", &vchan->vc); spin_lock_irqsave(&sdev->lock, flags); + vchan->paused = true; pchan = vchan->phy; if (pchan) { writel(DMA_CHAN_PAUSE_PAUSE, pchan->base + DMA_CHAN_PAUSE); + readl(pchan->base + DMA_CHAN_PAUSE); } else { list_del_init(&vchan->node); } @@ -959,12 +962,14 @@ static int sun6i_dma_resume(struct dma_chan *chan) spin_lock(&vchan->vc.lock); pchan = vchan->phy; + vchan->paused = false; if (pchan) { writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); - } else if (!list_empty(&vchan->vc.desc_issued)) { + } else if (!list_empty(&vchan->vc.desc_issued) && list_empty(&vchan->node)) { list_add_tail(&vchan->node, &sdev->pending); } + tasklet_schedule(&sdev->task); spin_unlock(&vchan->vc.lock); spin_unlock_irqrestore(&sdev->lock, flags); @@ -993,6 +998,7 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) } vchan->cyclic = false; + vchan->paused = false; vchan_get_all_descriptors(&vchan->vc, &head); if (pchan) { @@ -1040,6 +1046,8 @@ static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan, spin_lock_irqsave(&sdev->lock, flags); spin_lock(&vchan->vc.lock); ret = dma_cookie_status(chan, cookie, state); + if (ret == DMA_IN_PROGRESS && vchan->paused) + ret = DMA_PAUSED; if (ret == DMA_COMPLETE || !state) goto out; pchan = vchan->phy; @@ -1074,7 +1082,7 @@ static void sun6i_dma_issue_pending(struct dma_chan *chan) spin_lock(&vchan->vc.lock); if (vchan_issue_pending(&vchan->vc)) { - if (!vchan->phy && list_empty(&vchan->node)) { + if (!vchan->paused && !vchan->phy && list_empty(&vchan->node)) { list_add_tail(&vchan->node, &sdev->pending); tasklet_schedule(&sdev->task); dev_dbg(dmaengine_chan_dev(chan), "vchan %p: issued\n", From patchwork Fri Oct 23 03:14:56 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hilliard X-Patchwork-Id: 3698 Return-Path: X-Original-To: noreply@patchwork.local Delivered-To: noreply@patchwork.local Received: from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10]) by mxe881.netcup.net (Postfix) with ESMTPS id 2F1BD1C00DD for ; Fri, 23 Oct 2026 05:16:33 +0200 (CEST) Authentication-Results: mxe881; dkim=pass header.d=gmail.com; spf=pass (sender IP is 172.234.253.10) smtp.mailfrom=linux-sunxi+bounces-26811-noreply=patchwork.local@lists.linux.dev smtp.helo=sea.lore.kernel.org Received-SPF: pass (mxe881: domain of lists.linux.dev designates 172.234.253.10 as permitted sender) client-ip=172.234.253.10; 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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.15.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:15:04 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:56 -0600 Subject: [PATCH 5/6] dmaengine: sun6i: synchronize callbacks before releasing channel resources X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-5-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-1.19 / 15.00]; BAYES_HAM(-5.50)[100.00%]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:helo,sea.lore.kernel.org:rdns]; FROM_HAS_DN(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; RCPT_COUNT_TWELVE(0.00)[17]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com]; TAGGED_RCPT(0.00)[]; RCVD_COUNT_FIVE(0.00)[6]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; TAGGED_FROM(0.00)[bounces-26811-noreply=patchwork.local]; TO_DN_SOME(0.00)[]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10:c]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[174.29.1.49:received,100.77.114.92:received,209.85.210.48:received]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.234.253.10:from]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; FREEMAIL_FROM(0.00)[gmail.com]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: 2F1BD1C00DD X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= The driver has no device_synchronize callback. dmaengine_terminate_sync() therefore returns after stopping the channel without waiting for the virtual-channel tasklet. That tasklet may already have removed completed descriptors from the shared list and be executing their callbacks. For example, serial8250_release_dma() frees the RX buffer and unmaps the TX buffer immediately after terminate_sync(), while those callbacks can still access them. Use vchan_dma_synchronize() for device_synchronize. Channel termination excludes the interrupt handler and allocator before detaching the channel, so they cannot schedule another completion for that transfer. Also stop the channel and synchronize when freeing its resources. Keep terminated cyclic descriptors on desc_terminated until synchronization finishes. vchan_complete() may retain that descriptor outside vc.lock. Ordinary active descriptors have not published a callback and can still be freed by terminate_all(). This avoids accumulating descriptors on each 8250 partial-RX flush, which uses the atomic termination API. Fixes: 555859308723 ("dmaengine: sun6i: Add driver for the Allwinner A31 DMA controller") Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 7ac6693a041e..f807d9386939 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -994,12 +994,20 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) if (pchan && pchan->desc && pchan->desc != pchan->done) { struct virt_dma_desc *vd = &pchan->desc->vd; - vchan_terminate_vdesc(vd); + /* A cyclic callback may still hold this descriptor outside vc.lock. */ + if (vchan->cyclic) + vchan_terminate_vdesc(vd); + else + list_add_tail(&vd->node, &head); } vchan->cyclic = false; vchan->paused = false; - vchan_get_all_descriptors(&vchan->vc, &head); + /* Leave terminated cyclic descriptors for the sleepable synchronize. */ + list_splice_tail_init(&vchan->vc.desc_allocated, &head); + list_splice_tail_init(&vchan->vc.desc_submitted, &head); + list_splice_tail_init(&vchan->vc.desc_issued, &head); + list_splice_tail_init(&vchan->vc.desc_completed, &head); if (pchan) { writel(DMA_CHAN_ENABLE_STOP, pchan->base + DMA_CHAN_ENABLE); @@ -1099,14 +1107,10 @@ static void sun6i_dma_issue_pending(struct dma_chan *chan) static void sun6i_dma_free_chan_resources(struct dma_chan *chan) { - struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); struct sun6i_vchan *vchan = to_sun6i_vchan(chan); - unsigned long flags; - - spin_lock_irqsave(&sdev->lock, flags); - list_del_init(&vchan->node); - spin_unlock_irqrestore(&sdev->lock, flags); + sun6i_dma_terminate_all(chan); + vchan_dma_synchronize(chan); vchan_free_chan_resources(&vchan->vc); } @@ -1479,6 +1483,7 @@ static int sun6i_dma_probe(struct platform_device *pdev) sdc->slave.device_pause = sun6i_dma_pause; sdc->slave.device_resume = sun6i_dma_resume; sdc->slave.device_terminate_all = sun6i_dma_terminate_all; + sdc->slave.device_synchronize = vchan_dma_synchronize; sdc->slave.src_addr_widths = sdc->cfg->src_addr_widths; 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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-84fbda584d9sm938638a34.13.2026.10.22.20.15.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 20:15:05 -0700 (PDT) From: James Hilliard Date: Thu, 22 Oct 2026 21:14:57 -0600 Subject: [PATCH 6/6] dmaengine: sun6i: keep cyclic state with the prepared descriptor X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Message-Id: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-6-01085f684c9f@gmail.com> References: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> In-Reply-To: <20261022-submit-sun6i-dma-lifetime-next-v1-v1-0-01085f684c9f@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Arnd Bergmann , Maxime Ripard , Jens Kuske , Jean-Francois Moine Cc: Hongling Zeng , Chengfeng Ye , Nguyen Minh Tien , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, James Hilliard X-Mailer: b4 0.15.2 X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [4.31 / 15.00]; RBL_SENDERSCORE(2.00)[172.234.253.10:from]; SUSPICIOUS_RECIPS(1.50)[]; DMARC_POLICY_SOFTFAIL(1.00)[gmail.com : SPF not aligned (relaxed), No valid DKIM,none]; MAILLIST(-0.18)[generic]; MIME_GOOD(-0.10)[text/plain]; BAD_REP_POLICIES(0.10)[]; HAS_LIST_UNSUB(-0.01)[]; FROM_NEQ_ENVFROM(0.00)[jameshilliard1@gmail.com,linux-sunxi@lists.linux.dev]; FROM_HAS_DN(0.00)[]; RCVD_COUNT_FIVE(0.00)[6]; RCPT_COUNT_TWELVE(0.00)[17]; TAGGED_RCPT(0.00)[]; FREEMAIL_CC(0.00)[kylinos.cn,connect.ust.hk,embeddedlinux.blog,vger.kernel.org,lists.infradead.org,lists.linux.dev,gmail.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[sea.lore.kernel.org:helo,sea.lore.kernel.org:rdns]; FORGED_SENDER_MAILLIST(0.00)[]; ASN(0.00)[asn:63949, ipnet:172.234.224.0/19, country:SG]; MID_RHS_MATCH_FROM(0.00)[]; TO_DN_SOME(0.00)[]; FREEMAIL_FROM(0.00)[gmail.com]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[100.77.114.92:received,174.29.1.49:received,209.85.210.51:received]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[172.234.253.10:from]; TAGGED_FROM(0.00)[bounces-26812-noreply=patchwork.local]; R_SPF_ALLOW(0.00)[+ip4:172.234.253.10]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; ARC_ALLOW(0.00)[subspace.kernel.org:s=arc20261015:i=2]; FREEMAIL_TO(0.00)[kernel.org,gmail.com,sholland.org,arndb.de,free.fr]; RCVD_TLS_LAST(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_VIA_SMTP_AUTH(0.00)[] X-Rspamd-Queue-Id: ACC071C081C X-MORS-Enabled: yes X-MORS-DOMAIN: patchwork.local X-MORS-HOSTING: hosting172546 X-MORS-USER: hosting172546 X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= Preparing a cyclic transfer sets vchan->cyclic before the descriptor is submitted. A finite transfer on that channel can then select package interrupts and take the cyclic callback path instead of completing its cookie. Merely preparing an unrelated future transfer must not change the active transfer or the meaning of queued descriptors. Store the flag in sun6i_desc and consult the active descriptor when selecting interrupts, completing a transfer and terminating it. Finite descriptors retain their zero-initialized flag. This also makes callback retirement depend on the descriptor whose lifetime is being ended. The shared state was identified during the H616 cyclic UART RX review. Fixes: a90e173f3faf ("dmaengine: sun6i: Add cyclic capability") Signed-off-by: James Hilliard --- drivers/dma/sun6i-dma.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index f807d9386939..5fac3a991314 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -191,6 +191,7 @@ struct sun6i_desc { struct virt_dma_desc vd; dma_addr_t p_lli; struct sun6i_dma_lli *v_lli; + bool cyclic; }; struct sun6i_pchan { @@ -208,7 +209,6 @@ struct sun6i_vchan { struct sun6i_pchan *phy; u8 port; u8 irq_type; - bool cyclic; bool paused; }; @@ -509,7 +509,7 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vchan) (DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << (irq_offset * DMA_IRQ_CHAN_WIDTH)); - vchan->irq_type = vchan->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; + vchan->irq_type = pchan->desc->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; irq_val = sun6i_read_irq_en(sdev, irq_reg); irq_val &= ~((DMA_IRQ_HALF | DMA_IRQ_PKG | DMA_IRQ_QUEUE) << @@ -606,7 +606,7 @@ static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id) vchan = pchan->vchan; if (vchan && (status & vchan->irq_type)) { spin_lock(&vchan->vc.lock); - if (vchan->cyclic) { + if (pchan->desc->cyclic) { vchan_cyclic_callback(&pchan->desc->vd); } else { vchan_cookie_complete(&pchan->desc->vd); @@ -906,7 +906,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic( prev->p_lli_next = txd->p_lli; /* cyclic list */ - vchan->cyclic = true; + txd->cyclic = true; return vchan_tx_prep(&vchan->vc, &txd->vd, flags); @@ -995,13 +995,12 @@ static int sun6i_dma_terminate_all(struct dma_chan *chan) struct virt_dma_desc *vd = &pchan->desc->vd; /* A cyclic callback may still hold this descriptor outside vc.lock. */ - if (vchan->cyclic) + if (pchan->desc->cyclic) vchan_terminate_vdesc(vd); else list_add_tail(&vd->node, &head); } - vchan->cyclic = false; vchan->paused = false; /* Leave terminated cyclic descriptors for the sleepable synchronize. */ list_splice_tail_init(&vchan->vc.desc_allocated, &head);