mbox series

[v2,0/3] arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND

Message ID 20260302153559.3199783-1-wens@kernel.org (mailing list archive)
Headers
Series arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND |

Message

Chen-Yu Tsai March 2, 2026, 3:35 p.m. UTC 
Hi,

This is v2 of my Avaota A1 SPI NAND enablement series.

Changes since v1:
- DT bindings (Krzysztof)
  - Moved "allOf:" block after "required:" block
  - Dropped "type:" from child node in conditional block
- Collected tags
- Link to v1:
  https://lore.kernel.org/linux-sunxi/20260227175157.2339758-1-wens@kernel.org/

This series enables the SPI NAND found on the Avaota A1 in Quad SPI
mode. The SPI driver already supports Dual SPI and Quad SPI, but the
bindings need to be updated to allow it.

Patch 1 updates the binding to allow Dual SPI and Quad SPI on the newer
SoCs. It also allows describing no TX or no RX available.

Patch 2 adds another set of pins for spi0 on the A523 SoC family. This
set is used for the SPI NAND on the Avaota A1 board.

Patch 3 enables the SPI NAND found on the board. No partition layout
is provided at the moment.


Please have a look.


Thanks
ChenYu


Chen-Yu Tsai (3):
  spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
  arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pins
  arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND

 .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 29 ++++++++++++---
 .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 35 +++++++++++++++++++
 .../dts/allwinner/sun55i-t527-avaota-a1.dts   | 15 ++++++++
 3 files changed, 74 insertions(+), 5 deletions(-)

Comments

Chen-Yu Tsai March 10, 2026, 7:41 p.m. UTC | #1 
On Mon, 02 Mar 2026 23:35:55 +0800, Chen-Yu Tsai wrote:
> This is v2 of my Avaota A1 SPI NAND enablement series.
> 
> Changes since v1:
> - DT bindings (Krzysztof)
>   - Moved "allOf:" block after "required:" block
>   - Dropped "type:" from child node in conditional block
> - Collected tags
> - Link to v1:
>   https://lore.kernel.org/linux-sunxi/20260227175157.2339758-1-wens@kernel.org/
> 
> [...]

Applied to sunxi/dt-for-7.1 in local tree, thanks!

[1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
      commit: e2f93f45d38f7b6dacb44203cfc7bb5d7e287b8e
[2/3] arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pins
      commit: 1a5ff6a0a8c2a0dc9f2d55039997c1cd928eb53c
[3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND
      commit: 1b07332bf2ee816130e139a8966d312bf1aa32f9

Best regards,
Mark Brown March 10, 2026, 7:42 p.m. UTC | #2 
On Wed, Mar 11, 2026 at 03:41:07AM +0800, Chen-Yu Tsai wrote:

> [1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
>       commit: e2f93f45d38f7b6dacb44203cfc7bb5d7e287b8e

I'd have expected to take this one?
Chen-Yu Tsai March 10, 2026, 7:44 p.m. UTC | #3 
On Wed, Mar 11, 2026 at 3:42 AM Mark Brown <broonie@kernel.org> wrote:
>
> On Wed, Mar 11, 2026 at 03:41:07AM +0800, Chen-Yu Tsai wrote:
>
> > [1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
> >       commit: e2f93f45d38f7b6dacb44203cfc7bb5d7e287b8e
>
> I'd have expected to take this one?

Normally you merge patches pretty quickly, so I thought maybe you weren't
going to take this one.

I can back it out if you want to take it through the SPI tree.


Thanks
ChenYu
Mark Brown March 10, 2026, 7:47 p.m. UTC | #4 
On Wed, Mar 11, 2026 at 03:44:01AM +0800, Chen-Yu Tsai wrote:
> On Wed, Mar 11, 2026 at 3:42 AM Mark Brown <broonie@kernel.org> wrote:
> > On Wed, Mar 11, 2026 at 03:41:07AM +0800, Chen-Yu Tsai wrote:

> > > [1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
> > >       commit: e2f93f45d38f7b6dacb44203cfc7bb5d7e287b8e

> > I'd have expected to take this one?

> Normally you merge patches pretty quickly, so I thought maybe you weren't
> going to take this one.

I tend to leave a week or two if I think it's likely someone's going to
review.

> I can back it out if you want to take it through the SPI tree.

Probably safer for conflicts.
Chen-Yu Tsai March 10, 2026, 7:49 p.m. UTC | #5 
On Wed, Mar 11, 2026 at 3:48 AM Mark Brown <broonie@kernel.org> wrote:
>
> On Wed, Mar 11, 2026 at 03:44:01AM +0800, Chen-Yu Tsai wrote:
> > On Wed, Mar 11, 2026 at 3:42 AM Mark Brown <broonie@kernel.org> wrote:
> > > On Wed, Mar 11, 2026 at 03:41:07AM +0800, Chen-Yu Tsai wrote:
>
> > > > [1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
> > > >       commit: e2f93f45d38f7b6dacb44203cfc7bb5d7e287b8e
>
> > > I'd have expected to take this one?
>
> > Normally you merge patches pretty quickly, so I thought maybe you weren't
> > going to take this one.
>
> I tend to leave a week or two if I think it's likely someone's going to
> review.
>
> > I can back it out if you want to take it through the SPI tree.
>
> Probably safer for conflicts.

Now backed out.
Mark Brown March 11, 2026, 6:57 p.m. UTC | #6 
On Mon, 02 Mar 2026 23:35:55 +0800, Chen-Yu Tsai wrote:
> This is v2 of my Avaota A1 SPI NAND enablement series.
> 
> Changes since v1:
> - DT bindings (Krzysztof)
>   - Moved "allOf:" block after "required:" block
>   - Dropped "type:" from child node in conditional block
> - Collected tags
> - Link to v1:
>   https://lore.kernel.org/linux-sunxi/20260227175157.2339758-1-wens@kernel.org/
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
      commit: 743956bb9990214ff1dac66ef59e27221dc3c2d8

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark
Mark Brown March 14, 2026, 9:59 p.m. UTC | #7 
On Mon, 02 Mar 2026 23:35:55 +0800, Chen-Yu Tsai wrote:
> arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND
> 
> Hi,
> 
> This is v2 of my Avaota A1 SPI NAND enablement series.
> 
> Changes since v1:
> - DT bindings (Krzysztof)
>   - Moved "allOf:" block after "required:" block
>   - Dropped "type:" from child node in conditional block
> - Collected tags
> - Link to v1:
>   https://lore.kernel.org/linux-sunxi/20260227175157.2339758-1-wens@kernel.org/
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-7.0

Thanks!

[1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
      https://git.kernel.org/broonie/misc/c/743956bb9990

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark