| Message ID | 20260430135838.3438728-1-andre.przywara@arm.com (mailing list archive) |
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sunxi: DRAM: rework NSI priority settings
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Message
Andre Przywara
April 30, 2026, 1:58 p.m. UTC
Hi,
this is an extension of Paul's previous patch [1] to set the DRAM bus
arbitration priorities on the Allwinner A133 SoC. His patch was just
addressing the A133, but the A523 already sets up the priorities, using
apparently the same IP ("NSI") for that.
So patch 1/2 factors out that code, as suggested by Jernej, to make it
reusable by patch 2/2, which is a port of Paul's patch to that new
function.
Please note that this just tries to mimic the existing NSI setup for the
A523, there are more DRAM masters on that SoC, and the BSP code sets
them up with the lowest priorities. I guess this is also the reset
default, so I kept those masters out for now. Please let me know if we
should set them up explicitly regardless.
[1] https://lore.kernel.org/u-boot/20260128235727.1322861-1-contact@paulk.fr/#t
Cheers,
Andre
Andre Przywara (1):
sunxi: A523: Move NSI init routine into generic function
Paul Kocialkowski (1):
sunxi: A133: dram: Add NSI arbiter configuration support
.../include/asm/arch-sunxi/cpu_sun50i_h6.h | 4 ++
.../include/asm/arch-sunxi/cpu_sunxi_ncat2.h | 1 +
.../include/asm/arch-sunxi/dram_sun50i_a133.h | 23 +++++++++
.../include/asm/arch-sunxi/dram_sun55i_a523.h | 29 +++++++++++
arch/arm/include/asm/arch-sunxi/sunxi_nsi.h | 25 ++++++++++
arch/arm/mach-sunxi/Makefile | 4 +-
arch/arm/mach-sunxi/dram_sun50i_a133.c | 43 +++++++++++++++-
arch/arm/mach-sunxi/dram_sun55i_a523.c | 49 +++++++++----------
arch/arm/mach-sunxi/sunxi_nsi.c | 31 ++++++++++++
9 files changed, 180 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/include/asm/arch-sunxi/sunxi_nsi.h
create mode 100644 arch/arm/mach-sunxi/sunxi_nsi.c