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From: Christian Lugnberg <christian.lugnberg@soundtrack.io>
To: vkoul@kernel.org
Cc: Frank.Li@kernel.org,
wens@kernel.org,
jernej.skrabec@gmail.com,
samuel@sholland.org,
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Christian Lugnberg <christian.lugnberg@soundtrack.io>
Subject: [PATCH v3 0/2] dmaengine: sun6i: Fix two bugs in the DMA status path
Date: Mon, 17 Aug 2026 15:51:21 +0200
Message-ID: <20260817135723.12807-1-christian.lugnberg@soundtrack.io>
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| Series |
dmaengine: sun6i: Fix two bugs in the DMA status path
|
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Message
Christian Lugnberg
Aug. 17, 2026, 1:51 p.m. UTC
Thank you for the review, Frank.
Changes in v3:
- Patch 1: trim commit message to the root-cause explanation and fix
description, dropping the debug/reproduction part per feedback
- Patch 2: unchanged since v2
Christian Lugnberg (2):
dmaengine: sun6i: fix non-atomic read of DMA position registers
dmaengine: sun6i: fix undefined behaviour in sun6i_dma_tx_status
drivers/dma/sun6i-dma.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
Comments
On Mon, Aug 17, 2026 at 03:51:22PM +0200, Christian Lugnberg wrote: > sun6i_get_chan_size() reads DMA_CHAN_LLI_ADDR and DMA_CHAN_CUR_CNT in two > separate readl() calls with no synchronisation between them: > > pos = readl(pchan->base + DMA_CHAN_LLI_ADDR); > bytes = readl(pchan->base + DMA_CHAN_CUR_CNT); > > DMA_CHAN_LLI_ADDR holds the physical address of the *next* descriptor the > engine will load once the current one completes. DMA_CHAN_CUR_CNT holds the > remaining byte count for the *current* descriptor. If the DMA engine > advances to the next LLI entry between the two reads, pos becomes stale: it > still points to what was the next descriptor at the time of the first read, > but that descriptor is now the current one and CUR_CNT reflects its initial > (full) byte count. The subsequent virtual-chain walk starts one entry too > early and accumulates an extra full period's worth of bytes into the > residue estimate. > > Fix this by re-reading DMA_CHAN_LLI_ADDR after DMA_CHAN_CUR_CNT and > retrying if the value changed. This double-read pattern guarantees that > both registers were sampled during the same descriptor interval. The cost > is at most one extra readl() pair per call in the racy case, which occurs > only at descriptor boundaries (~every 2 ms) and is negligible. > > Fixes: a90e173f3faf ("dmaengine: sun6i: Add cyclic capability") > Cc: stable@vger.kernel.org > Assisted-by: Claude:claude-sonnet-4-6 > Signed-off-by: Christian Lugnberg <christian.lugnberg@soundtrack.io> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > drivers/dma/sun6i-dma.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c > index f47a326dd7ff..04fe1f5042e9 100644 > --- a/drivers/dma/sun6i-dma.c > +++ b/drivers/dma/sun6i-dma.c > @@ -354,8 +354,10 @@ static size_t sun6i_get_chan_size(struct sun6i_pchan *pchan) > size_t bytes; > dma_addr_t pos; > > - pos = readl(pchan->base + DMA_CHAN_LLI_ADDR); > - bytes = readl(pchan->base + DMA_CHAN_CUR_CNT); > + do { > + pos = readl(pchan->base + DMA_CHAN_LLI_ADDR); > + bytes = readl(pchan->base + DMA_CHAN_CUR_CNT); > + } while (pos != readl(pchan->base + DMA_CHAN_LLI_ADDR)); > > if (pos == LLI_LAST_ITEM) > return bytes; > -- > 2.54.0 (Apple Git-156) >