[RFT,net-next,09/10] arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port
Commit Message
From: Chen-Yu Tsai <wens@csie.org>
On the Avaota A1 board, the second Ethernet controller, aka the GMAC200,
is connected to a second external RTL8211F-CG PHY. The PHY uses an
external 25MHz crystal, and has the SoC's PJ16 pin connected to its
reset pin.
Enable the second Ethernet port. Also fix up the label for the existing
external PHY connected to the first Ethernet port.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../dts/allwinner/sun55i-t527-avaota-a1.dts | 26 +++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
@@ -13,6 +13,7 @@ / {
aliases {
ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
serial0 = &uart0;
};
@@ -67,7 +68,7 @@ &ehci1 {
&gmac0 {
phy-mode = "rgmii-id";
- phy-handle = <&ext_rgmii_phy>;
+ phy-handle = <&ext_rgmii0_phy>;
phy-supply = <®_dcdc4>;
allwinner,tx-delay-ps = <100>;
@@ -76,8 +77,19 @@ &gmac0 {
status = "okay";
};
+&gmac1 {
+ phy-mode = "rgmii-id";
+ phy-handle = <&ext_rgmii1_phy>;
+ phy-supply = <®_dcdc4>;
+
+ allwinner,tx-delay-ps = <100>;
+ allwinner,rx-delay-ps = <100>;
+
+ status = "okay";
+};
+
&mdio0 {
- ext_rgmii_phy: ethernet-phy@1 {
+ ext_rgmii0_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
@@ -86,6 +98,16 @@ ext_rgmii_phy: ethernet-phy@1 {
};
};
+&mdio1 {
+ ext_rgmii1_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */
+ reset-assert-us = <10000>;
+ reset-deassert-us = <150000>;
+ };
+};
+
&mmc0 {
vmmc-supply = <®_cldo3>;
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */