[3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND

Message ID 20260227175157.2339758-4-wens@kernel.org (mailing list archive)
State New
Headers
Series arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND |

Commit Message

Chen-Yu Tsai Feb. 27, 2026, 5:51 p.m. UTC
The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ
pins with support for QSPI.

Enable spi0 and add a device node for the SPI NAND chip.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 .../boot/dts/allwinner/sun55i-t527-avaota-a1.dts  | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
  

Comments

Jernej Skrabec Feb. 28, 2026, 7:12 p.m. UTC | #1
Dne petek, 27. februar 2026 ob 18:51:55 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ
> pins with support for QSPI.
> 
> Enable spi0 and add a device node for the SPI NAND chip.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>


Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej
  

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
index 7c24121de88f..474354fbfcec 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
@@ -403,6 +403,21 @@  &rtc {
 	assigned-clock-rates = <32768>;
 };
 
+&spi0  {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pj_pins>, <&spi0_cs0_pj_pin>,
+		    <&spi0_hold_pj_pin>, <&spi0_wp_pj_pin>;
+	status = "okay";
+
+	nand@0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <4>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pb_pins>;