diff mbox series

arm64: allwinner: a523: Enable MCU PRCM and NPU

Message ID DU0P190MB244586AE96B47F85AFE7A702BC02A@DU0P190MB2445.EURP190.PROD.OUTLOOK.COM (mailing list archive)
State New
Headers
Series net: stmmac: Add support for Allwinner A523 GMAC200 |

Commit Message

Muhammed Subair Sept. 6, 2025, 7:30 a.m. UTC 
Hello

I have a board with A527 chip , and NPU is detected in  legacy while the new patches shows below message 

upstream 6.17-rc4
# dmesg | grep [   21.988215] etnaviv-gpu 7122000.npu: probe with driver etnaviv-gpu failed with error -110
 7122000
[   21.988173] etnaviv-gpu 7122000.npu: deferred probe timeout, ignoring dependency
[   21.988215] etnaviv-gpu 7122000.npu: probe with driver etnaviv-gpu failed with error -110

legacy 5.15

[   13.887892] npu[106][106] vipcore, platform device compatible=allwinner,npu
[   13.890322] npu[106][106] vipcore, platform driver device=0xffffff80c1a11c10
[   13.890394] npu[106][106] vipcore irq number is 116.
[   13.890471] vipcore 7122000.npu: supply npu not found, using dummy regulator
[   13.892589] npu[106][106] NPU Use VF3, use freq 696
[   13.892754] npu[106][106] Get NPU Regulator Control FAIL!
[   13.892766] npu[106][106] Want set npu vol(1000000) now vol(-22)
[   13.938664] npu[106][106] core_0, request irqline=116, name=vipcore_0
[   13.938889] npu[106][106] vipcore, allocate page for video memory, size: 0x2000000bytes
[   13.938900] npu[106][106] vipcore, video memory heap size is more than 4Mbyte,only can allocate 4M byte from page
[   13.938948] npu[106][106] vipcore, cpu_physical=0x10cc00000, vip_physical=0x10cc00000, vip_memsize=0x400000
[   13.940230] npu[106][106] VIPLite driver version 1.13.0.0-AW-2023-01-09
[   25.090905] sunxi:sunxi_pd_test-0.pd-npu-test:[WARN]: runtime_suspend disable clock

-----Original Message-----
From: Chen-Yu Tsai <wens@kernel.org> 
Sent: Saturday, 6 September 2025 8:14 AM
To: Andrew Lunn <andrew+netdev@lunn.ch>; David S. Miller <davem@davemloft.net>; Eric Dumazet <edumazet@google.com>; Jakub Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Chen-Yu Tsai <wens@csie.org>; Jernej Skrabec <jernej@kernel.org>; Samuel Holland <samuel@sholland.org>
Cc: netdev@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-sunxi@lists.linux.dev; linux-kernel@vger.kernel.org; Andre Przywara <andre.przywara@arm.com>; Jernej Skrabec <jernej.skrabec@gmail.com>
Subject: [PATCH net-next v3 10/10] arm64: dts: allwinner: t527: orangepi-4a: Enable Ethernet port

From: Chen-Yu Tsai <wens@csie.org>

On the Orangepi 4A board, the second Ethernet controller, aka the GMAC200, is connected to an external Motorcomm YT8531 PHY. The PHY uses an external 25MHz crystal, has the SoC's PI15 pin connected to its reset pin, and the PI16 pin for its interrupt pin.

Enable it.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---

Changes since v1:
- Switch to generic (tx|rx)-internal-delay-ps properties
---
 .../dts/allwinner/sun55i-t527-orangepi-4a.dts | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)

--
2.39.5
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
index 38cd8c7e92da..7afd6e57fe86 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
@@ -15,6 +15,7 @@  / {
 	compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";
 
 	aliases {
+		ethernet0 = &gmac1;
 		serial0 = &uart0;
 	};
 
@@ -95,11 +96,33 @@  &ehci1 {
 	status = "okay";
 };
 
+&gmac1 {
+	phy-mode = "rgmii-id";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_cldo4>;
+
+	tx-internal-delay-ps = <0>;
+	rx-internal-delay-ps = <300>;
+
+	status = "okay";
+};
+
 &gpu {
 	mali-supply = <&reg_dcdc2>;
 	status = "okay";
 };
 
+&mdio1 {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+		interrupts-extended = <&pio 8 16 IRQ_TYPE_LEVEL_LOW>; /* PI16 */
+		reset-gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */
+		reset-assert-us = <10000>;
+		reset-deassert-us = <150000>;
+	};
+};
+
 &mmc0 {
 	vmmc-supply = <&reg_cldo3>;
 	cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */