[1/4] media: dt-bindings: allwinner,sun4i-a10-ir: add A523 compatible

The A523 (sun55i) contains a newer revision of the sunxi CIR receiver.
It is not backwards-compatible with the A31 programming model: the
control register has a pulse capture mode field (bits [7:6]) that
resets to a value which captures no pulses at all, and the sample
clock divider is now selectable via SPLCFG bits [1:0] instead of
being fixed at the old module clock / 64.

Since a kernel driving it as an A31 CIR receives nothing, add the
compatible as a standalone entry rather than under the
allwinner,sun6i-a31-ir fallback.

Signed-off-by: Justin Suess <utilityemal77@gmail.com>
---
 .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml        | 1 +
 1 file changed, 1 insertion(+)
  

On Thu, Jul 02, 2026 at 05:47:47PM -0400, Justin Suess wrote:
> The A523 (sun55i) contains a newer revision of the sunxi CIR receiver.
> It is not backwards-compatible with the A31 programming model: the
> control register has a pulse capture mode field (bits [7:6]) that
> resets to a value which captures no pulses at all, and the sample
> clock divider is now selectable via SPLCFG bits [1:0] instead of
> being fixed at the old module clock / 64.
> 
> Since a kernel driving it as an A31 CIR receives nothing, add the
> compatible as a standalone entry rather than under the
> allwinner,sun6i-a31-ir fallback.
> 
> Signed-off-by: Justin Suess <utilityemal77@gmail.com>
> ---
>  .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml        | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> index 42dfe22ad5f1..06656058ce91 100644
> --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> @@ -19,6 +19,7 @@ properties:
>        - const: allwinner,sun4i-a10-ir
>        - const: allwinner,sun5i-a13-ir
>        - const: allwinner,sun6i-a31-ir
> +      - const: allwinner,sun55i-a523-ir

I assume you are adding it in expected order that Allwinner is
following, not just randomly at the end of any list.

Also, please change all above entries to one enum, can be the same
commit.


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof
  

On Fri, Jul 03, 2026 at 12:56:00PM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jul 02, 2026 at 05:47:47PM -0400, Justin Suess wrote:
> > The A523 (sun55i) contains a newer revision of the sunxi CIR receiver.
> > It is not backwards-compatible with the A31 programming model: the
> > control register has a pulse capture mode field (bits [7:6]) that
> > resets to a value which captures no pulses at all, and the sample
> > clock divider is now selectable via SPLCFG bits [1:0] instead of
> > being fixed at the old module clock / 64.
> > 
> > Since a kernel driving it as an A31 CIR receives nothing, add the
> > compatible as a standalone entry rather than under the
> > allwinner,sun6i-a31-ir fallback.
> > 
> > Signed-off-by: Justin Suess <utilityemal77@gmail.com>
> > ---
> >  .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml        | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > index 42dfe22ad5f1..06656058ce91 100644
> > --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > @@ -19,6 +19,7 @@ properties:
> >        - const: allwinner,sun4i-a10-ir
> >        - const: allwinner,sun5i-a13-ir
> >        - const: allwinner,sun6i-a31-ir
> > +      - const: allwinner,sun55i-a523-ir
> 
> I assume you are adding it in expected order that Allwinner is
> following, not just randomly at the end of any list.
>
I did it in product generation order, is that what is expected?
I know that the a523 series succeeded a31, so that's what I put for
ordering.
> Also, please change all above entries to one enum, can be the same
> commit.
> 
No problem, I'll do that for v2.  
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> 
> Best regards,
> Krzysztof
>
  

On 03/07/2026 21:50, Justin Suess wrote:
> On Fri, Jul 03, 2026 at 12:56:00PM +0200, Krzysztof Kozlowski wrote:
>> On Thu, Jul 02, 2026 at 05:47:47PM -0400, Justin Suess wrote:
>>> The A523 (sun55i) contains a newer revision of the sunxi CIR receiver.
>>> It is not backwards-compatible with the A31 programming model: the
>>> control register has a pulse capture mode field (bits [7:6]) that
>>> resets to a value which captures no pulses at all, and the sample
>>> clock divider is now selectable via SPLCFG bits [1:0] instead of
>>> being fixed at the old module clock / 64.
>>>
>>> Since a kernel driving it as an A31 CIR receives nothing, add the
>>> compatible as a standalone entry rather than under the
>>> allwinner,sun6i-a31-ir fallback.
>>>
>>> Signed-off-by: Justin Suess <utilityemal77@gmail.com>
>>> ---
>>>  .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml        | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
>>> index 42dfe22ad5f1..06656058ce91 100644
>>> --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
>>> +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
>>> @@ -19,6 +19,7 @@ properties:
>>>        - const: allwinner,sun4i-a10-ir
>>>        - const: allwinner,sun5i-a13-ir
>>>        - const: allwinner,sun6i-a31-ir
>>> +      - const: allwinner,sun55i-a523-ir
>>
>> I assume you are adding it in expected order that Allwinner is
>> following, not just randomly at the end of any list.
>>
> I did it in product generation order, is that what is expected?

Don't ask me, I have no clue. There is only one recommended order for
every SoC and that is alphabetical. One or two platforms opted out, so
it's your task or maintainers job to remember the order - I just ask if
you keep that one here.


Best regards,
Krzysztof
  

On Sat, Jul 4, 2026 at 3:50 AM Justin Suess <utilityemal77@gmail.com> wrote:
>
> On Fri, Jul 03, 2026 at 12:56:00PM +0200, Krzysztof Kozlowski wrote:
> > On Thu, Jul 02, 2026 at 05:47:47PM -0400, Justin Suess wrote:
> > > The A523 (sun55i) contains a newer revision of the sunxi CIR receiver.
> > > It is not backwards-compatible with the A31 programming model: the
> > > control register has a pulse capture mode field (bits [7:6]) that
> > > resets to a value which captures no pulses at all, and the sample
> > > clock divider is now selectable via SPLCFG bits [1:0] instead of
> > > being fixed at the old module clock / 64.
> > >
> > > Since a kernel driving it as an A31 CIR receives nothing, add the
> > > compatible as a standalone entry rather than under the
> > > allwinner,sun6i-a31-ir fallback.
> > >
> > > Signed-off-by: Justin Suess <utilityemal77@gmail.com>
> > > ---
> > >  .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml        | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > > index 42dfe22ad5f1..06656058ce91 100644
> > > --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > > +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > > @@ -19,6 +19,7 @@ properties:
> > >        - const: allwinner,sun4i-a10-ir
> > >        - const: allwinner,sun5i-a13-ir
> > >        - const: allwinner,sun6i-a31-ir
> > > +      - const: allwinner,sun55i-a523-ir
> >
> > I assume you are adding it in expected order that Allwinner is
> > following, not just randomly at the end of any list.
> >
> I did it in product generation order, is that what is expected?
> I know that the a523 series succeeded a31, so that's what I put for
> ordering.

Yes it is.

> > Also, please change all above entries to one enum, can be the same
> > commit.
> >
> No problem, I'll do that for v2.
> >
> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> >
> > Best regards,
> > Krzysztof
> >