diff mbox series

[3/4] arm64: dts: allwinner: a523: add IR receiver node

Message ID 20260702214750.3428694-4-utilityemal77@gmail.com (mailing list archive)
State New
Headers
Series media: rc: sunxi-cir: support the A523/H728/T527 IR receiver |

Commit Message

Justin Suess July 2, 2026, 9:47 p.m. UTC 
The A523 has a CIR receiver in the RTC power domain, clocked from the
R-CCU, with its RX signal available on PL11.

Clock the module directly from the 24 MHz host oscillator; the driver
selects a /256 sample divider on this SoC, giving a sample period
close to the legacy 8 MHz / 64 configuration of older SoCs.

Keep the node disabled by default; boards with an IR receiver can
enable it.

Signed-off-by: Justin Suess <utilityemal77@gmail.com>
---
 .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Andre Przywara July 6, 2026, 9:21 a.m. UTC | #1 
Hi Justin,

I checked the numbers below against the manual, they match up: MMIO base 
address, interrupt number, clocks and resets.

One thing I figured is that the A523/T527 contains another CIR-RX 
instance, in the "CPUX" domain. That's used for instance on the 
Avaota-A1. So we need another node describing this instance.

Some more below...

On 7/2/26 23:47, Justin Suess wrote:
> The A523 has a CIR receiver in the RTC power domain, clocked from the
> R-CCU, with its RX signal available on PL11.
> 
> Clock the module directly from the 24 MHz host oscillator; the driver
> selects a /256 sample divider on this SoC, giving a sample period
> close to the legacy 8 MHz / 64 configuration of older SoCs.
> 
> Keep the node disabled by default; boards with an IR receiver can
> enable it.
> 
> Signed-off-by: Justin Suess <utilityemal77@gmail.com>
> ---
>   .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index ca6a16807049..5e46c4b1ee61 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -927,6 +927,25 @@ r_i2c_pins: r-i2c-pins {
>   				allwinner,pinmux = <2>;
>   				function = "r_i2c0";
>   			};
> +
> +			r_ir_rx_pin: r-ir-rx-pin {
> +				pins = "PL11";
> +				allwinner,pinmux = <2>;
> +				function = "s_cir";
> +			};
> +		};
> +
> +		r_ir: ir@7040000 {
> +			compatible = "allwinner,sun55i-a523-ir";

As mentioned in the other email, I think we can use the fallback 
compatible, so add this here.

> +			reg = <0x07040000 0x400>;
> +			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&r_ccu CLK_BUS_R_IR_RX>, <&r_ccu CLK_R_IR_RX>;
> +			clock-names = "apb", "ir";
> +			clock-frequency = <24000000>;

As said in the other email, I think this property is misnamed and 
misleading, just drop it, and let the driver select the sample rate.

> +			resets = <&r_ccu RST_BUS_R_IR_RX>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&r_ir_rx_pin>;

There is another pin which carries the R-IR-RX signal, on pin PM8. In 
those cases we do not add the pinctrl properties to the .dtsi DT node, 
but let each board add it, right next to where they enable the IP.
So please drop those two lines from here.

Cheers,
Andre

> +			status = "disabled";
>   		};
>   
>   		pck600: power-controller@7060000 {
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index ca6a16807049..5e46c4b1ee61 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -927,6 +927,25 @@  r_i2c_pins: r-i2c-pins {
 				allwinner,pinmux = <2>;
 				function = "r_i2c0";
 			};
+
+			r_ir_rx_pin: r-ir-rx-pin {
+				pins = "PL11";
+				allwinner,pinmux = <2>;
+				function = "s_cir";
+			};
+		};
+
+		r_ir: ir@7040000 {
+			compatible = "allwinner,sun55i-a523-ir";
+			reg = <0x07040000 0x400>;
+			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu CLK_BUS_R_IR_RX>, <&r_ccu CLK_R_IR_RX>;
+			clock-names = "apb", "ir";
+			clock-frequency = <24000000>;
+			resets = <&r_ccu RST_BUS_R_IR_RX>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&r_ir_rx_pin>;
+			status = "disabled";
 		};
 
 		pck600: power-controller@7060000 {