[2/2] arm64: dts: allwinner: Add SPC Glee 10.1 A64

Message ID 20260906-b4-spc-glee-a64-v1-v1-2-621df2155e31@proton.me (mailing list archive)
State New
Headers
Series Add SPC Glee 10.1 A64 board support |

Commit Message

Juan Carlos Gutiérrez Lavado via B4 Relay Sept. 6, 2026, 4:05 p.m. UTC
From: Juan Carlos Gutiérrez Lavado <jcarlosgl96@proton.me>

Add support for the SPC Glee 10.1 tablet based on the Allwinner
A64. Describe the 2 GiB of DRAM, AXP803 PMIC, essential CPU and
system rails, microSD slot, UART console, battery monitoring and USB
peripheral port. Leave eMMC and unverified peripherals disabled.

This configuration was boot-tested from microSD to Arch Linux ARM
userspace without regulator_ignore_unused.

Signed-off-by: Juan Carlos Gutiérrez Lavado <jcarlosgl96@proton.me>
---
 arch/arm64/boot/dts/allwinner/Makefile             |   1 +
 .../boot/dts/allwinner/sun50i-a64-spc-glee.dts     | 123 +++++++++++++++++++++
 2 files changed, 124 insertions(+)
  

Comments

sashiko-bot@kernel.org Sept. 6, 2026, 4:21 p.m. UTC | #1
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Missing sun50i-a64-cpu-opp.dtsi include breaks CPUfreq and thermal cooling
- [Medium] Missing usb_power_supply enablement breaks USB charger detection
--

commit bdf7f6917d0d11f91550b9e8dcb96f41a0c5bde4
Author: Juan Carlos Gutiérrez Lavado <jcarlosgl96@proton.me>

arm64: dts: allwinner: Add SPC Glee 10.1 A64

Add support for the SPC Glee 10.1 tablet based on the Allwinner A64. It
describes essential components including the PMIC, microSD, UART, and USB.

> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts
> new file mode 100644
> index 0000000000000..1ca7c36de65e2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts
> @@ -0,0 +1,123 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2026 SPC Glee A64 Linux contributors
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"

[Severity: Medium]
Does this board device tree omission break CPUfreq and thermal cooling?

By omitting the sun50i-a64-cpu-opp.dtsi include here, the board device tree
includes the base SoC definitions but lacks the CPU operating points required
for cpufreq and thermal management.

During boot, the thermal and cpufreq-dt drivers will probe the CPU nodes but
find no operating-points-v2 property. This can cause the cpufreq driver to
abort initialization, leaving the CPU pinned to the fixed bootloader
frequency and preventing the registration of CPU cooling devices. The thermal
framework would then be unable to actively throttle the CPU, which may risk
thermal trip shutdowns under load and degrade battery life.

Should the sun50i-a64-cpu-opp.dtsi file be included here?

[ ... ]

> +&usb_otg {
> +	dr_mode = "peripheral";
> +	status = "okay";
> +};
> +
> +&usbphy {
> +	status = "okay";
> +};

[Severity: Medium]
Does enabling the usbphy without enabling the usb_power_supply break USB
charger detection?

The usbphy node is enabled, but the required &usb_power_supply node (which
monitors VBUS on the PMIC) is completely omitted and not linked via
usb0_vbus_power-supply.

Because the AXP803 PMIC's USB power supply node defaults to disabled in
axp803.dtsi, failing to override it to okay in the board file means the AXP
USB power supply driver (axp20x_usb_power) will not probe.

As a result, userspace tools will not know when a USB charger is connected.
Furthermore, without being linked to the usbphy, the USB PHY driver will
forcefully assume VBUS is always present, which could cause erratic USB
peripheral state transitions when unplugged.
  

Patch

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index aa21f58a4..cc6687b39 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -21,6 +21,7 @@  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab-early-adopter.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-spc-glee.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h64-remix-mini-pc.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts
new file mode 100644
index 000000000..1ca7c36de
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-spc-glee.dts
@@ -0,0 +1,123 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2026 SPC Glee A64 Linux contributors
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+/ {
+	model = "SPC Glee 10.1 A64";
+	compatible = "spc,glee-10-1-a64", "allwinner,sun50i-a64";
+	chassis-type = "tablet";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x40000000 0x80000000>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins>;
+	vmmc-supply = <&reg_dcdc1>;
+	vqmmc-supply = <&reg_dcdc1>;
+	broken-cd;
+	bus-width = <4>;
+	max-frequency = <25000000>;
+	status = "okay";
+};
+
+&r_rsb {
+	status = "okay";
+
+	axp803: pmic@3a3 {
+		compatible = "x-powers,axp803";
+		reg = <0x3a3>;
+		interrupt-parent = <&r_intc>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+#include "axp803.dtsi"
+
+&axp_adc {
+	status = "okay";
+};
+
+&battery_power_supply {
+	status = "okay";
+};
+
+&reg_dcdc1 {
+	regulator-always-on;
+	regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1300000>;
+	regulator-name = "vdd-cpux";
+};
+
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+	regulator-always-on;
+	regulator-min-microvolt = <1100000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_fldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1100000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpus";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pb_pins>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};