[1/7] dt-bindings: rtc: sun6i: Add Allwinner A733 support
Commit Message
The RTC module in the Allwinner A733 SoC is functionally compatible with
the sun6i RTC, but its internal Clock Control Unit (CCU) has significant
changes.
The A733 supports selecting the oscillator between three frequencies:
19.2MHz, 24MHz, and 26MHz. The RTC CCU relies on hardware to detect
which frequency is actually used on the board. By defining all three
frequencies as fixed-clocks in the device tree, the driver can identify
the hardware-detected frequency and expose it to the rest of the system.
Additionally, the A733 RTC CCU provides several new DCXO gate clocks for
specific modules, including SerDes, HDMI, and UFS.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
.../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 38 ++++++++++++++++++++--
include/dt-bindings/clock/sun60i-a733-rtc.h | 16 +++++++++
2 files changed, 52 insertions(+), 2 deletions(-)
Comments
Hi ChenYu,
Thanks for your patient review.
On Sat Mar 28, 2026 at 8:37 PM CST, Chen-Yu Tsai wrote:
> On Wed, Jan 21, 2026 at 7:03 PM Junhui Liu <junhui.liu@pigmoral.tech> wrote:
>>
>> The RTC module in the Allwinner A733 SoC is functionally compatible with
>> the sun6i RTC, but its internal Clock Control Unit (CCU) has significant
>> changes.
>>
>> The A733 supports selecting the oscillator between three frequencies:
>> 19.2MHz, 24MHz, and 26MHz. The RTC CCU relies on hardware to detect
>> which frequency is actually used on the board. By defining all three
>> frequencies as fixed-clocks in the device tree, the driver can identify
>> the hardware-detected frequency and expose it to the rest of the system.
>
> No. The board device tree shall have the exact and correct frequency
> defined in the external crystal device node. The operating system can
> use the hardware-detected frequency to "fix" the in-system representation
> if it is off.
Okay, I will keep only one main external crystal in the device tree.
>
>> Additionally, the A733 RTC CCU provides several new DCXO gate clocks for
>> specific modules, including SerDes, HDMI, and UFS.
>>
>> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
>> ---
>> .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 38 ++++++++++++++++++++--
>> include/dt-bindings/clock/sun60i-a733-rtc.h | 16 +++++++++
>> 2 files changed, 52 insertions(+), 2 deletions(-)
>>
[...]
>> diff --git a/include/dt-bindings/clock/sun60i-a733-rtc.h b/include/dt-bindings/clock/sun60i-a733-rtc.h
>> new file mode 100644
>> index 000000000000..8a2b5facad73
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/sun60i-a733-rtc.h
>> @@ -0,0 +1,16 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
>> +
>> +#ifndef _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_
>> +#define _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_
>> +
>> +#define CLK_IOSC 0
>> +#define CLK_OSC32K 1
>> +#define CLK_HOSC 2
>
> The DCXO enable control has been present since at least the H6. We just
> never added it, as we would never disable it anyway.
I will remove it.
>
> If you compare the RTC clock trees of the A733 and A523, the only addition
> besides the new gates seems to be the LOSC auto selection. But even that
> is just an illusion, as the A523 has the same registers for that.
>
> One could say the A733 RTC is almost backward compatible to the A523, if
> not for the two fastboot registers the A523 has at 0x120 and 0x124.
>
> So I ask that you try to integrate the differences into the existing
> driver and bindings. You can tweak and export internal clks if you
> need.
Okay, I will try to integrate the A733 RTC support into the existing
driver and bindings.
But first I would like to ask for your advice on how to correctly
organize the device tree binding header for the clocks? I have two ideas
in mind:
1. Add the common internal clocks (e.g., CLK_RTC_32K) to the existing
sun6i-rtc.h. Then, create a new sun60i-a733-rtc.h which includes
the old sun6i-rtc.h and appends the A733-specific clock gates.
2. Simply append all the new A733-specific clock IDs directly to the
bottom of the existing sun6i-rtc.h, sharing the same header file for all
SoCs utilizing this driver.
>
>> +#define CLK_RTC_32K 3
>
> AFAICT besides being an internal clock, this is also fed to GPIO for
> debounce? We probably need to expose this on the A523 as well.
>
I will do it.
>
> Thanks
> ChenYu
>
@@ -26,6 +26,7 @@ properties:
- allwinner,sun50i-h6-rtc
- allwinner,sun50i-h616-rtc
- allwinner,sun50i-r329-rtc
+ - allwinner,sun60i-a733-rtc
- items:
- const: allwinner,sun50i-a64-rtc
- const: allwinner,sun8i-h3-rtc
@@ -46,11 +47,11 @@ properties:
clocks:
minItems: 1
- maxItems: 4
+ maxItems: 6
clock-names:
minItems: 1
- maxItems: 4
+ maxItems: 6
clock-output-names:
minItems: 1
@@ -156,6 +157,38 @@ allOf:
- clocks
- clock-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun60i-a733-rtc
+
+ then:
+ properties:
+ clocks:
+ minItems: 5
+ items:
+ - description: Bus clock for register access
+ - description: 19.2 MHz oscillator
+ - description: 24 MHz oscillator
+ - description: 26 MHz oscillator
+ - description: AHB parent for internal SPI clock
+ - description: External 32768 Hz oscillator
+
+ clock-names:
+ minItems: 5
+ items:
+ - const: bus
+ - const: osc19M
+ - const: osc24M
+ - const: osc26M
+ - const: ahb
+ - const: ext-osc32k
+
+ required:
+ - clocks
+ - clock-names
+
- if:
properties:
compatible:
@@ -164,6 +197,7 @@ allOf:
- allwinner,sun8i-r40-rtc
- allwinner,sun50i-h616-rtc
- allwinner,sun50i-r329-rtc
+ - allwinner,sun60i-a733-rtc
then:
properties:
new file mode 100644
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#ifndef _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_
+#define _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_
+
+#define CLK_IOSC 0
+#define CLK_OSC32K 1
+#define CLK_HOSC 2
+#define CLK_RTC_32K 3
+#define CLK_OSC32K_FANOUT 4
+#define CLK_HOSC_SERDES1 5
+#define CLK_HOSC_SERDES0 6
+#define CLK_HOSC_HDMI 7
+#define CLK_HOSC_UFS 8
+
+#endif /* _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_ */