diff mbox series

[v3,2/2] sunxi: H616: dram: drop default TPR6 Kconfig value

Message ID 20260427135819.2577234-3-andre.przywara@arm.com (mailing list archive)
State New
Headers
Series sunxi: H616: DRAM: Fix TPR6 parameter parsing |

Commit Message

Andre Przywara April 27, 2026, 1:58 p.m. UTC 
CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
non-zero default value. Since we need to provide a value for all the
other parameters anyway, avoiding TPR6 makes no real difference.
To make matters worse, TPR6 is a compound value covering multiple DRAM
types, but also spans over three SoCs, which makes it hard to find one
good default value.

Drop the default from Kconfig, and put some explicit values in the
defconfigs for the few boards that were relying on the default so far.
The value is taken from one BSP, only the lower byte matters anyway for
those boards, all using DDR3 DRAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/mach-sunxi/Kconfig         | 1 -
 configs/orangepi_zero2_defconfig    | 1 +
 configs/transpeed-8k618-t_defconfig | 1 +
 configs/x96_mate_defconfig          | 1 +
 configs/x96q_defconfig              | 1 +
 5 files changed, 4 insertions(+), 1 deletion(-)

Comments

Jernej Škrabec April 27, 2026, 6:42 p.m. UTC | #1 
Dne ponedeljek, 27. april 2026 ob 15:58:19 Srednjeevropski poletni čas je Andre Przywara napisal(a):
> CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
> non-zero default value. Since we need to provide a value for all the
> other parameters anyway, avoiding TPR6 makes no real difference.
> To make matters worse, TPR6 is a compound value covering multiple DRAM
> types, but also spans over three SoCs, which makes it hard to find one
> good default value.
> 
> Drop the default from Kconfig, and put some explicit values in the
> defconfigs for the few boards that were relying on the default so far.
> The value is taken from one BSP, only the lower byte matters anyway for
> those boards, all using DDR3 DRAM.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej
Paul Kocialkowski April 28, 2026, 9:49 a.m. UTC | #2 
Hi Andre,

Le Mon 27 Apr 26, 15:58, Andre Przywara a écrit :
> CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
> non-zero default value. Since we need to provide a value for all the
> other parameters anyway, avoiding TPR6 makes no real difference.
> To make matters worse, TPR6 is a compound value covering multiple DRAM
> types, but also spans over three SoCs, which makes it hard to find one
> good default value.
> 
> Drop the default from Kconfig, and put some explicit values in the
> defconfigs for the few boards that were relying on the default so far.
> The value is taken from one BSP, only the lower byte matters anyway for
> those boards, all using DDR3 DRAM.

It looks like this change is missing some boards that we support (e.g.
liontron-h-a133l). Is this intentional?

The TPR6 value is still used for all DRAM types, so I think we need to
define it for all the boards we currently support.

All the best,

Paul

> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/mach-sunxi/Kconfig         | 1 -
>  configs/orangepi_zero2_defconfig    | 1 +
>  configs/transpeed-8k618-t_defconfig | 1 +
>  configs/x96_mate_defconfig          | 1 +
>  configs/x96q_defconfig              | 1 +
>  5 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index 284458ad9a5..18123e685dc 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -151,7 +151,6 @@ config DRAM_SUNXI_TPR3
>  
>  config DRAM_SUNXI_TPR6
>  	hex "DRAM TPR6 parameter"
> -	default 0x3300c080
>  	help
>  	  TPR6 value from vendor DRAM settings.
>  
> diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
> index b387b4795ad..afd1535052d 100644
> --- a/configs/orangepi_zero2_defconfig
> +++ b/configs/orangepi_zero2_defconfig
> @@ -5,6 +5,7 @@ CONFIG_SPL=y
>  CONFIG_DRAM_SUNXI_DX_ODT=0x08080808
>  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
>  CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e
> +CONFIG_DRAM_SUNXI_TPR6=0x33808080
>  CONFIG_DRAM_SUNXI_TPR10=0xf83438
>  CONFIG_MACH_SUN50I_H616=y
>  CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
> diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig
> index e4bf5e8efd3..e672d8f8df9 100644
> --- a/configs/transpeed-8k618-t_defconfig
> +++ b/configs/transpeed-8k618-t_defconfig
> @@ -7,6 +7,7 @@ CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
>  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
>  CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
>  CONFIG_DRAM_SUNXI_TPR0=0xc0001002
> +CONFIG_DRAM_SUNXI_TPR6=0x33808080
>  CONFIG_DRAM_SUNXI_TPR10=0x2f1107
>  CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
>  CONFIG_DRAM_SUNXI_TPR12=0xeddc7665
> diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig
> index c0628370df9..1b7d9338c02 100644
> --- a/configs/x96_mate_defconfig
> +++ b/configs/x96_mate_defconfig
> @@ -6,6 +6,7 @@ CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
>  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
>  CONFIG_DRAM_SUNXI_CA_DRI=0x1c12
>  CONFIG_DRAM_SUNXI_TPR0=0xc0000c05
> +CONFIG_DRAM_SUNXI_TPR6=0x33808080
>  CONFIG_DRAM_SUNXI_TPR10=0x2f0007
>  CONFIG_DRAM_SUNXI_TPR11=0xffffdddd
>  CONFIG_DRAM_SUNXI_TPR12=0xfedf7557
> diff --git a/configs/x96q_defconfig b/configs/x96q_defconfig
> index 59f01aae4eb..068aee3fd1e 100644
> --- a/configs/x96q_defconfig
> +++ b/configs/x96q_defconfig
> @@ -8,6 +8,7 @@ CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
>  CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
>  CONFIG_DRAM_SUNXI_TPR0=0xc0001002
>  CONFIG_DRAM_SUNXI_TPR2=0x00000100
> +CONFIG_DRAM_SUNXI_TPR6=0x33808080
>  CONFIG_DRAM_SUNXI_TPR10=0x002f0107
>  CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
>  CONFIG_DRAM_SUNXI_TPR12=0xeddc7665
> -- 
> 2.43.0
>
Paul Kocialkowski April 28, 2026, 5:39 p.m. UTC | #3 
Hi again,

Le Tue 28 Apr 26, 11:49, Paul Kocialkowski a écrit :
> Hi Andre,
> 
> Le Mon 27 Apr 26, 15:58, Andre Przywara a écrit :
> > CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
> > non-zero default value. Since we need to provide a value for all the
> > other parameters anyway, avoiding TPR6 makes no real difference.
> > To make matters worse, TPR6 is a compound value covering multiple DRAM
> > types, but also spans over three SoCs, which makes it hard to find one
> > good default value.
> > 
> > Drop the default from Kconfig, and put some explicit values in the
> > defconfigs for the few boards that were relying on the default so far.
> > The value is taken from one BSP, only the lower byte matters anyway for
> > those boards, all using DDR3 DRAM.
> 
> It looks like this change is missing some boards that we support (e.g.
> liontron-h-a133l). Is this intentional?
> 
> The TPR6 value is still used for all DRAM types, so I think we need to
> define it for all the boards we currently support.

Nevermind this, these other boards already have TPR6 in their config,
lost sight of that. Then this is:

Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>

Thanks for picking this up!

All the best,

Paul

> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm/mach-sunxi/Kconfig         | 1 -
> >  configs/orangepi_zero2_defconfig    | 1 +
> >  configs/transpeed-8k618-t_defconfig | 1 +
> >  configs/x96_mate_defconfig          | 1 +
> >  configs/x96q_defconfig              | 1 +
> >  5 files changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> > index 284458ad9a5..18123e685dc 100644
> > --- a/arch/arm/mach-sunxi/Kconfig
> > +++ b/arch/arm/mach-sunxi/Kconfig
> > @@ -151,7 +151,6 @@ config DRAM_SUNXI_TPR3
> >  
> >  config DRAM_SUNXI_TPR6
> >  	hex "DRAM TPR6 parameter"
> > -	default 0x3300c080
> >  	help
> >  	  TPR6 value from vendor DRAM settings.
> >  
> > diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
> > index b387b4795ad..afd1535052d 100644
> > --- a/configs/orangepi_zero2_defconfig
> > +++ b/configs/orangepi_zero2_defconfig
> > @@ -5,6 +5,7 @@ CONFIG_SPL=y
> >  CONFIG_DRAM_SUNXI_DX_ODT=0x08080808
> >  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
> >  CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e
> > +CONFIG_DRAM_SUNXI_TPR6=0x33808080
> >  CONFIG_DRAM_SUNXI_TPR10=0xf83438
> >  CONFIG_MACH_SUN50I_H616=y
> >  CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
> > diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig
> > index e4bf5e8efd3..e672d8f8df9 100644
> > --- a/configs/transpeed-8k618-t_defconfig
> > +++ b/configs/transpeed-8k618-t_defconfig
> > @@ -7,6 +7,7 @@ CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
> >  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
> >  CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
> >  CONFIG_DRAM_SUNXI_TPR0=0xc0001002
> > +CONFIG_DRAM_SUNXI_TPR6=0x33808080
> >  CONFIG_DRAM_SUNXI_TPR10=0x2f1107
> >  CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
> >  CONFIG_DRAM_SUNXI_TPR12=0xeddc7665
> > diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig
> > index c0628370df9..1b7d9338c02 100644
> > --- a/configs/x96_mate_defconfig
> > +++ b/configs/x96_mate_defconfig
> > @@ -6,6 +6,7 @@ CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
> >  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
> >  CONFIG_DRAM_SUNXI_CA_DRI=0x1c12
> >  CONFIG_DRAM_SUNXI_TPR0=0xc0000c05
> > +CONFIG_DRAM_SUNXI_TPR6=0x33808080
> >  CONFIG_DRAM_SUNXI_TPR10=0x2f0007
> >  CONFIG_DRAM_SUNXI_TPR11=0xffffdddd
> >  CONFIG_DRAM_SUNXI_TPR12=0xfedf7557
> > diff --git a/configs/x96q_defconfig b/configs/x96q_defconfig
> > index 59f01aae4eb..068aee3fd1e 100644
> > --- a/configs/x96q_defconfig
> > +++ b/configs/x96q_defconfig
> > @@ -8,6 +8,7 @@ CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
> >  CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
> >  CONFIG_DRAM_SUNXI_TPR0=0xc0001002
> >  CONFIG_DRAM_SUNXI_TPR2=0x00000100
> > +CONFIG_DRAM_SUNXI_TPR6=0x33808080
> >  CONFIG_DRAM_SUNXI_TPR10=0x002f0107
> >  CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
> >  CONFIG_DRAM_SUNXI_TPR12=0xeddc7665
> > -- 
> > 2.43.0
> > 
> 
> -- 
> Paul Kocialkowski,
> 
> Independent contractor - sys-base - https://www.sys-base.io/
> Free software developer - https://www.paulk.fr/
> 
> Expert in multimedia, graphics and embedded hardware support with Linux.
diff mbox series

Patch

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 284458ad9a5..18123e685dc 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -151,7 +151,6 @@  config DRAM_SUNXI_TPR3
 
 config DRAM_SUNXI_TPR6
 	hex "DRAM TPR6 parameter"
-	default 0x3300c080
 	help
 	  TPR6 value from vendor DRAM settings.
 
diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
index b387b4795ad..afd1535052d 100644
--- a/configs/orangepi_zero2_defconfig
+++ b/configs/orangepi_zero2_defconfig
@@ -5,6 +5,7 @@  CONFIG_SPL=y
 CONFIG_DRAM_SUNXI_DX_ODT=0x08080808
 CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
 CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e
+CONFIG_DRAM_SUNXI_TPR6=0x33808080
 CONFIG_DRAM_SUNXI_TPR10=0xf83438
 CONFIG_MACH_SUN50I_H616=y
 CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig
index e4bf5e8efd3..e672d8f8df9 100644
--- a/configs/transpeed-8k618-t_defconfig
+++ b/configs/transpeed-8k618-t_defconfig
@@ -7,6 +7,7 @@  CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
 CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
 CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
 CONFIG_DRAM_SUNXI_TPR0=0xc0001002
+CONFIG_DRAM_SUNXI_TPR6=0x33808080
 CONFIG_DRAM_SUNXI_TPR10=0x2f1107
 CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
 CONFIG_DRAM_SUNXI_TPR12=0xeddc7665
diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig
index c0628370df9..1b7d9338c02 100644
--- a/configs/x96_mate_defconfig
+++ b/configs/x96_mate_defconfig
@@ -6,6 +6,7 @@  CONFIG_DRAM_SUNXI_DX_ODT=0x03030303
 CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
 CONFIG_DRAM_SUNXI_CA_DRI=0x1c12
 CONFIG_DRAM_SUNXI_TPR0=0xc0000c05
+CONFIG_DRAM_SUNXI_TPR6=0x33808080
 CONFIG_DRAM_SUNXI_TPR10=0x2f0007
 CONFIG_DRAM_SUNXI_TPR11=0xffffdddd
 CONFIG_DRAM_SUNXI_TPR12=0xfedf7557
diff --git a/configs/x96q_defconfig b/configs/x96q_defconfig
index 59f01aae4eb..068aee3fd1e 100644
--- a/configs/x96q_defconfig
+++ b/configs/x96q_defconfig
@@ -8,6 +8,7 @@  CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e
 CONFIG_DRAM_SUNXI_CA_DRI=0x1f12
 CONFIG_DRAM_SUNXI_TPR0=0xc0001002
 CONFIG_DRAM_SUNXI_TPR2=0x00000100
+CONFIG_DRAM_SUNXI_TPR6=0x33808080
 CONFIG_DRAM_SUNXI_TPR10=0x002f0107
 CONFIG_DRAM_SUNXI_TPR11=0xddddcccc
 CONFIG_DRAM_SUNXI_TPR12=0xeddc7665