diff mbox series

[v3,1/2] sunxi: H616: dram: fix LPDDR3 TPR6 parsing

Message ID 20260427135819.2577234-2-andre.przywara@arm.com (mailing list archive)
State New
Headers
Series sunxi: H616: DRAM: Fix TPR6 parameter parsing |

Commit Message

Andre Przywara April 27, 2026, 1:58 p.m. UTC 
From: Jernej Skrabec <jernej.skrabec@gmail.com>

Allwinner's DRAM initialisation code defines a parameter named TPR6,
presumably containing some "Vref" parameter, but containing values for
*all* DRAM types. The runtime code selects one byte based on the DRAM
type used.
This selection code was wrong for LPDDR3, the value is encoded in
bits [23:16], not [15:8]. Fix that in the code, which also aligns it
with the very similar code for the A133 and A523.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reported-by: Philippe Simons <simons.philippe@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Paul Kocialkowski April 28, 2026, 9:41 a.m. UTC | #1 
Hi Andre,

Le Mon 27 Apr 26, 15:58, Andre Przywara a écrit :
> From: Jernej Skrabec <jernej.skrabec@gmail.com>
> 
> Allwinner's DRAM initialisation code defines a parameter named TPR6,
> presumably containing some "Vref" parameter, but containing values for
> *all* DRAM types. The runtime code selects one byte based on the DRAM
> type used.
> This selection code was wrong for LPDDR3, the value is encoded in
> bits [23:16], not [15:8]. Fix that in the code, which also aligns it
> with the very similar code for the A133 and A523.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> Reported-by: Philippe Simons <simons.philippe@gmail.com>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>

Thanks!

> ---
>  arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c
> index 3345c9b8e82..42a0550e015 100644
> --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
> +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
> @@ -975,7 +975,7 @@ static bool mctl_phy_init(const struct dram_para *para,
>  		val = para->tpr6 & 0xff;
>  		break;
>  	case SUNXI_DRAM_TYPE_LPDDR3:
> -		val = para->tpr6 >> 8 & 0xff;
> +		val = para->tpr6 >> 16 & 0xff;
>  		break;
>  	case SUNXI_DRAM_TYPE_LPDDR4:
>  		val = para->tpr6 >> 24 & 0xff;
> -- 
> 2.43.0
>
diff mbox series

Patch

diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c
index 3345c9b8e82..42a0550e015 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
@@ -975,7 +975,7 @@  static bool mctl_phy_init(const struct dram_para *para,
 		val = para->tpr6 & 0xff;
 		break;
 	case SUNXI_DRAM_TYPE_LPDDR3:
-		val = para->tpr6 >> 8 & 0xff;
+		val = para->tpr6 >> 16 & 0xff;
 		break;
 	case SUNXI_DRAM_TYPE_LPDDR4:
 		val = para->tpr6 >> 24 & 0xff;