[1/2] arm64: dts: allwinner: sun50i-a64: add UART DMA channels

Message ID 20260324161930.1602083-1-wens@kernel.org (mailing list archive)
State New
Headers
Series [1/2] arm64: dts: allwinner: sun50i-a64: add UART DMA channels |

Commit Message

Chen-Yu Tsai March 24, 2026, 4:19 p.m. UTC
All the UARTs support DMA and are hooked up to the DMA controller.

Add the DMA channels for the UARTs

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
  

Comments

Jernej Skrabec March 25, 2026, 12:31 a.m. UTC | #1
Dne torek, 24. marec 2026 ob 17:19:28 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> All the UARTs support DMA and are hooked up to the DMA controller.
> 
> Add the DMA channels for the UARTs
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej
  
Chen-Yu Tsai March 29, 2026, 1:22 p.m. UTC | #2
On Wed, 25 Mar 2026 00:19:28 +0800, Chen-Yu Tsai wrote:
> All the UARTs support DMA and are hooked up to the DMA controller.
> 
> Add the DMA channels for the UARTs
> 
> 

Applied to sunxi/dt-for-7.1 in local tree, thanks!

[1/2] arm64: dts: allwinner: sun50i-a64: add UART DMA channels
      commit: 1e80a0367bca7ffe3dfff41948474fe3c3ad3587
[2/2] arm64: dts: allwinner: sun50i-h6: add UART DMA channels
      commit: 2e4858d2f027080827c5fc557306a06fbfcecd0a

Best regards,
  

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0fecf0abb204..04a26762a19a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -1000,6 +1000,8 @@  uart0: serial@1c28000 {
 			reg-io-width = <4>;
 			clocks = <&ccu CLK_BUS_UART0>;
 			resets = <&ccu RST_BUS_UART0>;
+			dmas = <&dma 6>, <&dma 6>;
+			dma-names = "tx", "rx";
 			status = "disabled";
 		};
 
@@ -1011,6 +1013,8 @@  uart1: serial@1c28400 {
 			reg-io-width = <4>;
 			clocks = <&ccu CLK_BUS_UART1>;
 			resets = <&ccu RST_BUS_UART1>;
+			dmas = <&dma 7>, <&dma 7>;
+			dma-names = "tx", "rx";
 			status = "disabled";
 		};
 
@@ -1022,6 +1026,8 @@  uart2: serial@1c28800 {
 			reg-io-width = <4>;
 			clocks = <&ccu CLK_BUS_UART2>;
 			resets = <&ccu RST_BUS_UART2>;
+			dmas = <&dma 8>, <&dma 8>;
+			dma-names = "tx", "rx";
 			status = "disabled";
 		};
 
@@ -1033,6 +1039,8 @@  uart3: serial@1c28c00 {
 			reg-io-width = <4>;
 			clocks = <&ccu CLK_BUS_UART3>;
 			resets = <&ccu RST_BUS_UART3>;
+			dmas = <&dma 9>, <&dma 9>;
+			dma-names = "tx", "rx";
 			status = "disabled";
 		};
 
@@ -1044,6 +1052,8 @@  uart4: serial@1c29000 {
 			reg-io-width = <4>;
 			clocks = <&ccu CLK_BUS_UART4>;
 			resets = <&ccu RST_BUS_UART4>;
+			dmas = <&dma 10>, <&dma 10>;
+			dma-names = "tx", "rx";
 			status = "disabled";
 		};