[v4,2/3] riscv: dts: allwinner: d1s-t113: Add uart4 pinctrl required by NetCube Systems OpenNMC
| Message ID | 20260606205452.2386930-3-lukas.schmid@netcube.li (mailing list archive) |
|---|---|
| State | New |
| Headers |
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Sat, 6 Jun 2026 22:55:14 +0200 From: Lukas Schmid <lukas.schmid@netcube.li> To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@kernel.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Samuel Holland <samuel@sholland.org>, Paul Walmsley <pjw@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Alexandre Ghiti <alex@ghiti.fr>, Maxime Ripard <mripard@kernel.org> Cc: Lukas Schmid <lukas.schmid@netcube.li>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 2/3] riscv: dts: allwinner: d1s-t113: Add uart4 pinctrl required by NetCube Systems OpenNMC Date: Sat, 6 Jun 2026 22:54:42 +0200 Message-ID: <20260606205452.2386930-3-lukas.schmid@netcube.li> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260606205452.2386930-1-lukas.schmid@netcube.li> References: <20260606205452.2386930-1-lukas.schmid@netcube.li> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: <linux-sunxi.lists.linux.dev> List-Subscribe: <mailto:linux-sunxi+subscribe@lists.linux.dev> List-Unsubscribe: <mailto:linux-sunxi+unsubscribe@lists.linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspamd-worker-8404 X-Spamd-Result: default: False [-0.66 / 15.00]; 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Add support for NetCube Systems OpenNMC (dobermann)
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Commit Message
Lukas Schmid
June 6, 2026, 8:54 p.m. UTC
Added the "uart4_pb_pins" pinctrl used by the OpenNMC
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
---
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
Comments
Hi, On 6/6/26 22:54, Lukas Schmid wrote: > Added the "uart4_pb_pins" pinctrl used by the OpenNMC Checked against the datasheet: Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > > Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li> > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 82cc85acccb1..00fddedfa36f 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -191,6 +191,12 @@ uart3_pb_pins: uart3-pb-pins { > pins = "PB6", "PB7"; > function = "uart3"; > }; > + > + /omit-if-no-ref/ > + uart4_pb_pins: uart4-pb-pins { > + pins = "PB2", "PB3"; > + function = "uart4"; > + }; > }; > > ccu: clock-controller@2001000 {
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 82cc85acccb1..00fddedfa36f 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -191,6 +191,12 @@ uart3_pb_pins: uart3-pb-pins { pins = "PB6", "PB7"; function = "uart3"; }; + + /omit-if-no-ref/ + uart4_pb_pins: uart4-pb-pins { + pins = "PB2", "PB3"; + function = "uart4"; + }; }; ccu: clock-controller@2001000 {