[net-next,v11,3/7] dt-bindings: net: qcom: document the ethqos device for SCMI-based systems
Commit Message
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Describe the firmware-managed variant of the QCom DesignWare MAC. As the
properties here differ a lot from the HLOS-managed variant, lets put it
in a separate file. Since we need to update the maximum number of power
domains, let's update existing bindings referencing the top-level
snps,dwmac.yaml and limit their maxItems for power-domains to 1.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
.../bindings/net/allwinner,sun7i-a20-gmac.yaml | 3 +
.../bindings/net/altr,socfpga-stmmac.yaml | 3 +
.../bindings/net/amlogic,meson-dwmac.yaml | 3 +
.../devicetree/bindings/net/eswin,eic7700-eth.yaml | 3 +
.../devicetree/bindings/net/intel,dwmac-plat.yaml | 3 +
.../bindings/net/loongson,ls1b-gmac.yaml | 3 +
.../bindings/net/loongson,ls1c-emac.yaml | 3 +
.../devicetree/bindings/net/nxp,dwmac-imx.yaml | 3 +
.../devicetree/bindings/net/nxp,lpc1850-dwmac.yaml | 3 +
.../devicetree/bindings/net/nxp,s32-dwmac.yaml | 3 +
.../devicetree/bindings/net/qcom,ethqos.yaml | 3 +
.../bindings/net/qcom,sa8255p-ethqos.yaml | 107 +++++++++++++++++++++
.../devicetree/bindings/net/renesas,rzn1-gmac.yaml | 3 +
.../bindings/net/renesas,rzv2h-gbeth.yaml | 3 +
.../devicetree/bindings/net/rockchip-dwmac.yaml | 3 +
.../devicetree/bindings/net/snps,dwmac.yaml | 5 +-
.../bindings/net/sophgo,cv1800b-dwmac.yaml | 3 +
.../bindings/net/sophgo,sg2044-dwmac.yaml | 3 +
.../bindings/net/starfive,jh7110-dwmac.yaml | 3 +
.../devicetree/bindings/net/stm32-dwmac.yaml | 3 +
.../devicetree/bindings/net/tesla,fsd-ethqos.yaml | 3 +
.../devicetree/bindings/net/thead,th1520-gmac.yaml | 3 +
.../bindings/net/toshiba,visconti-dwmac.yaml | 3 +
MAINTAINERS | 1 +
24 files changed, 175 insertions(+), 1 deletion(-)
Comments
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The SCMI PHY driver fails to apply its power domain performance state dynamically when `phy_set_mode` is called on an already powered-on PHY, causing link speed to stall.
- [Medium] Device tree bindings missed update for `power-domains` maxItems constraints, allowing 2 power domains on hardware variants that only support 1.
--
commit 53c301c3f426ecddb2b45080a9a52eeda51a523e
Author: Bartosz Golaszewski <brgl@kernel.org>
dt-bindings: net: qcom: document the ethqos device for SCMI-based systems
Describe the firmware-managed variant of the QCom DesignWare MAC. As the
properties here differ a lot from the HLOS-managed variant, lets put it
in a separate file. Since we need to update the maximum number of power
domains, let's update existing bindings referencing the top-level
snps,dwmac.yaml and limit their maxItems for power-domains to 1.
> diff --git a/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml
> new file mode 100644
> index 0000000000000..5158481e5e5b0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml
[ ... ]
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + items:
> + - const: serdes
[Severity: High]
The SCMI PHY driver fails to apply its power domain performance state
dynamically when phy_set_mode is called on an already powered-on PHY. Will
this cause the link speed to stall?
If a link negotiates 2.5Gbps dynamically via phylink, but the PHY was
originally powered on in 1Gbps SGMII mode, the link speed stalls at 1000Mbps
because the PHY's SCMI performance state is not elevated to SPEED_2500.
The performance state is stored but not applied if the device is already
powered on:
drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c:qcom_dwmac_sgmii_phy_scmi_set_mode() {
...
priv->perf_state = (submode == PHY_INTERFACE_MODE_2500BASEX) ?
SPEED_2500 : SPEED_1000;
return 0;
}
The state is only sent to the GENPD core during power on, which executes too
early to capture runtime 2.5Gbps mode transitions:
drivers/phy/qualcomm/phy-qcom-sgmii-eth-scmi.c:qcom_dwmac_sgmii_phy_scmi_power_on() {
...
ret = dev_pm_genpd_set_performance_state(dev, priv->perf_state);
...
}
This is triggered when phylink resolves the speed and invokes phy_set_mode_ext
on the already powered-on PHY:
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c:ethqos_mac_finish_serdes() {
...
ret = phy_set_mode_ext(ethqos->serdes_phy, PHY_MODE_ETHERNET,
interface);
...
}
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 2449311c6d28e..d3aff1df3070d 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
[ ... ]
> @@ -185,7 +186,8 @@ properties:
> - const: ahb
>
> power-domains:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
[Severity: Medium]
When the common schema is relaxed to allow 2 power domains here, it affects
all dependent schemas that reference it. Could this unintentionally allow
maxItems: 2 in spacemit,k3-dwmac.yaml and nuvoton,ma35d1-dwmac.yaml?
These schemas reference snps,dwmac.yaml# in their allOf block but lack a
power-domains constraint override:
Documentation/devicetree/bindings/net/spacemit,k3-dwmac.yaml
allOf:
- $ref: snps,dwmac.yaml#
Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml
allOf:
- $ref: snps,dwmac.yaml#
Since they only support 1 power domain, dt_binding_check might now
incorrectly pass device trees specifying two power domains for these
hardware variants.
@@ -40,6 +40,9 @@ properties:
description:
PHY regulator
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -140,6 +140,9 @@ properties:
- description: offset of the control register
- description: shift within the control register
+ power-domains:
+ maxItems: 1
+
patternProperties:
"^mdio[0-9]$":
type: object
@@ -158,6 +158,9 @@ properties:
interrupt-names:
const: macirq
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -95,6 +95,9 @@ properties:
- description: Optional offset of register controlling TXD delay
- description: Optional offset of register controlling RXD delay
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -47,6 +47,9 @@ properties:
interrupt-names:
const: macirq
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- clocks
@@ -66,6 +66,9 @@ properties:
- mii
- rgmii-id
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -65,6 +65,9 @@ properties:
- mii
- rmii
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -83,6 +83,9 @@ properties:
description:
To select RMII reference clock from external.
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- clocks
@@ -51,6 +51,9 @@ properties:
items:
- const: stmmaceth
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -81,6 +81,9 @@ properties:
- const: rx
- const: ptp_ref
+ power-domains:
+ maxItems: 1
+
required:
- clocks
- clock-names
@@ -86,6 +86,9 @@ properties:
phy-names:
const: serdes
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- clocks
new file mode 100644
@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/qcom,sa8255p-ethqos.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Ethernet ETHQOS device (firmware managed)
+
+maintainers:
+ - Bjorn Andersson <andersson@kernel.org>
+ - Konrad Dybcio <konradybcio@kernel.org>
+ - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+description:
+ dwmac based Qualcomm ethernet devices which support Gigabit
+ ethernet (version v2.3.0 and onwards) with clocks, interconnects, etc.
+ managed by firmware
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+properties:
+ compatible:
+ const: qcom,sa8255p-ethqos
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: stmmaceth
+ - const: rgmii
+
+ interrupts:
+ items:
+ - description: Combined signal for various interrupt events
+ - description: The interrupt that occurs when HW safety error triggered
+
+ interrupt-names:
+ items:
+ - const: macirq
+ - const: sfty
+
+ power-domains:
+ minItems: 2
+ maxItems: 2
+
+ power-domain-names:
+ items:
+ - const: core
+ - const: mdio
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: serdes
+
+ iommus:
+ maxItems: 1
+
+ dma-coherent: true
+
+required:
+ - compatible
+ - reg-names
+ - power-domains
+ - power-domain-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ethernet: ethernet@23040000 {
+ compatible = "qcom,sa8255p-ethqos";
+ reg = <0x23040000 0x10000>,
+ <0x23056000 0x100>;
+ reg-names = "stmmaceth", "rgmii";
+
+ iommus = <&apps_smmu 0x120 0x7>;
+
+ interrupts = <GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "sfty";
+
+ dma-coherent;
+
+ snps,tso;
+ snps,pbl = <32>;
+ rx-fifo-depth = <16384>;
+ tx-fifo-depth = <16384>;
+
+ phy-handle = <ðernet_phy>;
+ phy-mode = "2500base-x";
+
+ snps,mtl-rx-config = <&mtl_rx_setup1>;
+ snps,mtl-tx-config = <&mtl_tx_setup1>;
+
+ power-domains = <&scmi8_pd 0>, <&scmi8_pd 1>;
+ power-domain-names = "core", "mdio";
+
+ phys = <&serdes1>;
+ phy-names = "serdes";
+ };
@@ -44,6 +44,9 @@ properties:
phandle pointing to a PCS sub-node compatible with
renesas,rzn1-miic.yaml#
+ power-domains:
+ maxItems: 1
+
required:
- compatible
@@ -154,6 +154,9 @@ properties:
Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml#
(Refer RZ/T2H portion in the DT-binding file)
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -123,6 +123,9 @@ properties:
phy-supply:
description: PHY regulator
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- clocks
@@ -72,6 +72,7 @@ properties:
- nuvoton,ma35d1-dwmac
- nxp,s32g2-dwmac
- qcom,qcs404-ethqos
+ - qcom,sa8255p-ethqos
- qcom,sa8775p-ethqos
- qcom,sc8280xp-ethqos
- qcom,sm8150-ethqos
@@ -185,7 +186,8 @@ properties:
- const: ahb
power-domains:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
mac-mode:
$ref: ethernet-controller.yaml#/properties/phy-connection-type
@@ -630,6 +632,7 @@ allOf:
- ingenic,x1830-mac
- ingenic,x2000-mac
- qcom,qcs404-ethqos
+ - qcom,sa8255p-ethqos
- qcom,sa8775p-ethqos
- qcom,sc8280xp-ethqos
- qcom,sm8150-ethqos
@@ -49,6 +49,9 @@ properties:
reset-names:
const: stmmaceth
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -52,6 +52,9 @@ properties:
interrupt-names:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 1
@@ -75,6 +75,9 @@ properties:
The argument one is the offset of phy mode selection, the
argument two is the shift of phy mode selection.
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -121,6 +121,9 @@ properties:
minItems: 1
maxItems: 2
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- clocks
@@ -67,6 +67,9 @@ properties:
- rgmii-rxid
- rgmii-txid
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -78,6 +78,9 @@ properties:
items:
- const: macirq
+ power-domains:
+ maxItems: 1
+
required:
- clocks
- clock-names
@@ -48,6 +48,9 @@ properties:
interrupt-names:
const: macirq
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -22184,6 +22184,7 @@ L: netdev@vger.kernel.org
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/qcom,ethqos.yaml
+F: Documentation/devicetree/bindings/net/qcom,sa8255p-ethqos.yaml
F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
QUALCOMM FASTRPC DRIVER