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[0/3] sunxi: assorted fixes to DRAM and clock init

Message ID 20250801234918.19176-1-andre.przywara@arm.com (mailing list archive)
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Series sunxi: assorted fixes to DRAM and clock init |

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Andre Przywara Aug. 1, 2025, 11:49 p.m. UTC 
Some assorted fixes for bugs I found while debugging and researching
the boot and DRAM init process on some chips.
Patch 1 and 2 fix bugs hidden by the fact that the code in question
would ever be compiled for arm64 only, but for an experiment I compiled
the A133 SPL for 32-bit, which revealed those issues.
Patch 3 fixes the mode register setup for the H616 boards with LPDDR3,
this was found when wrapping the mode register accesses into some
functions, for a later cleanup patch.

Please have a look!

Cheers,
Andre

Andre Przywara (3):
  sunxi: a133: dram: fix data type for address variable
  sunxi: spl: initialise timer before clocks
  sunxi: H616: dram: fix LPDDR3 mode register settings

 arch/arm/mach-sunxi/board.c            |  2 +-
 arch/arm/mach-sunxi/dram_sun50i_a133.c |  2 +-
 arch/arm/mach-sunxi/dram_sun50i_h616.c | 12 ++++++------
 3 files changed, 8 insertions(+), 8 deletions(-)