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[0/4] clk: sunxi-ng: a523: Fix single-divider clocks

Message ID 20260906-sunxi-clk-no-p-v1-0-cbde21c9fe69@pigmoral.tech (mailing list archive)
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Series clk: sunxi-ng: a523: Fix single-divider clocks |

Message

Junhui Liu Sept. 6, 2026, 7:06 a.m. UTC 
Sashiko pointed out two issues in my series adding clock driver support
for the Allwinner A733 SoC [1][2].

First, ccu_mp_set_rate() generates an invalid mask when an MP clock is
defined with a zero-width P divider, clearing unrelated register fields.
Second, ccu_mp_set_rate() does not handle CCU_FEATURE_UPDATE_BIT, so
divider changes are not latched by the hardware.

The affected A733 clocks were modeled after the existing A523 MBUS,
IOMMU, and DRAM clocks, which have the same issues. According to the
hardware description, these clocks only contain an M divider and should
be modeled as M-only clocks.

The A523 high-speed and PRCM timer clocks have the opposite problem.
They only contain a P divider but are modeled as MP clocks with a
zero-width M divider.

Add a feature-capable variant of the M-only clock macro and migrate the
affected A523 clocks to it. Convert the timer clocks to the existing
P-only clock type. The affected A733 clocks will use the new M-only
macro in the next revision of the A733 CCU series.

Tested on Radxa Cubie A5E with CLOCK_ALLOW_WRITE_DEBUGFS enabled:

  # cat /sys/kernel/debug/clk/mbus/clk_rate
  600000000
  # devmem 0x02001540 32
  0xC0000003

  # echo 300000000 > /sys/kernel/debug/clk/mbus/clk_rate

Results without this series:

  # cat /sys/kernel/debug/clk/mbus/clk_rate
  600000000
  # devmem 0x02001540 32
  0x00000003

Results with this series:

  # cat /sys/kernel/debug/clk/mbus/clk_rate
  300000000
  # devmem 0x02001540 32
  0xC0000007

Link: https://lore.kernel.org/r/20260905164854.57BEF1F00A3A@smtp.kernel.org [1]
Link: https://lore.kernel.org/r/20260905164855.57E751F00A3D@smtp.kernel.org [2]
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
Junhui Liu (4):
      clk: sunxi-ng: div: Add feature support to M clock macro
      clk: sunxi-ng: sun55i-a523-ccu: Use M-only clocks for MBUS, IOMMU and DRAM
      clk: sunxi-ng: sun55i-a523-ccu: Use P-only clocks for high-speed timers
      clk: sunxi-ng: sun55i-a523-r-ccu: Use P-only clocks for timers

 drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c |  37 ++++-----
 drivers/clk/sunxi-ng/ccu-sun55i-a523.c   | 128 ++++++++++++++-----------------
 drivers/clk/sunxi-ng/ccu_div.h           |  18 ++++-
 3 files changed, 88 insertions(+), 95 deletions(-)
---
base-commit: 4d7d9486c04d917265f64c55bd23b2cc4fe7749c
change-id: 20260906-sunxi-clk-no-p-de3574e5823a

Best regards,
--  
Junhui Liu <junhui.liu@pigmoral.tech>