| Message ID | 20260927-submit-h616-emac1-v1-v6-0-e64971f4e414@gmail.com (mailing list archive) |
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From: James Hilliard <james.hilliard1@gmail.com>
Subject: [PATCH net-next v6 0/3] net: stmmac: add Allwinner H616 EMAC1
support
Date: Sun, 27 Sep 2026 12:52:18 -0600
Message-Id: <20260927-submit-h616-emac1-v1-v6-0-e64971f4e414@gmail.com>
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X-Change-ID: 20260914-submit-h616-emac1-v1-143703842abb
To: Richard Genoud <richard.genoud@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Chen-Yu Tsai <wens@kernel.org>, Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
LABBE Corentin <clabbe.montjoie@gmail.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>
Cc: Alastair D'Silva <alastair@d-silva.org>,
Maxime Ripard <mripard@kernel.org>,
James Hilliard <james.hilliard1@gmail.com>, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev,
linux-stm32@st-md-mailman.stormreply.com, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Andre Przywara <andre.przywara@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
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|
| Series |
net: stmmac: add Allwinner H616 EMAC1 support
|
|
Message
James Hilliard
Sept. 27, 2026, 6:52 p.m. UTC
The H616 secondary EMAC supports RMII at 10/100 Mbps and uses a separate
system-control clock register at offset 0x34. Add its binding and a
sun8i stmmac variant using that register. A distinct compatible without
an older fallback prevents the driver from using EMAC0's clock register.
EMAC1 connects internally to the co-packaged AC200 or AC300 EPHY and has
no external PHY pins. Leave PHY initialization to the PHY driver instead
of using the H3 internal-PHY controls. The RMII-only variant does not
expose the RGMII clock-delay properties.
First move the MAC software reset from probe to the DMA reset callback,
after PHY initialization. This lets the MAC and its MDIO bus remain
registered when the PHY driver or one of its suppliers is not ready yet.
Mask interrupts before requesting reset and clear DMA and interrupt state
even if it times out. Keep the separate H3 MDIO-mux reset sequence
unchanged.
The AC200/AC300 EPHY driver and package bindings are already in
net-next. This series separates the H616 EMAC1 MAC driver and binding
support from the earlier combined series. PWM, MFD and device-tree
enablement are being handled separately.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
---
Changes in v6:
- Add Maxime Chevallier's review and test tags to the MAC reset patch.
- Drop Alastair D'Silva's cover-letter tags from the binding and add
the binding reviews from Andre Przywara and Krzysztof Kozlowski.
- Link to v5: https://patch.msgid.link/20260921-submit-h616-emac1-v1-v5-0-ada661ed9e9b@gmail.com
Changes in v5:
- Split the three generic phylink/stmmac recovery fixes into a separate
net series, as requested by Maxime Chevallier. Keep the sun8i MAC-reset
change, EMAC1 binding and variant in this net-next series.
- Add the originating driver's Fixes tag to the sun8i reset patch.
- Link to v4: https://patch.msgid.link/20260920-submit-h616-emac1-v1-v4-0-8347dfe2eb7d@gmail.com
Changes in v4:
- Add a prerequisite stmmac core fix closing the interface after a failed
MTU-change reopen without repeating DMA, IRQ or NAPI teardown.
- Close the interface after failed hardware resume, and let phylink
finish shutdown directly from its suspended state.
- Retain DMA and interrupt-register clearing when the sun8i MAC reset
times out, and return the original reset error.
- Link to v3: https://patch.msgid.link/20260917-submit-h616-emac1-v1-v3-0-62cb8316e19b@gmail.com
Changes in v3:
- Add a prerequisite fix moving the MAC software reset to the DMA reset
callback, after PHY initialization, so delayed module loading and
deferred PHY probes do not tear down the MAC and its MDIO bus.
- Preserve the H3 MDIO-mux reset and propagate hardware-reset failures
through the normal stmmac hardware-setup error path.
- Add Alastair D'Silva to Cc and rebase onto current net-next.
- Link to v2: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v2-0-322b32e40eb9@gmail.com
Changes in v2:
- Drop EMAC1 TX/RX clock-delay property support and keep the existing
RGMII-only delay descriptions unchanged, as requested by Maxime Ripard.
- Clarify that EMAC1 connects internally to a co-packaged PHY, not an
external PHY or the H3-style internal-PHY controls.
- Rebase onto current net-next.
- Link to v1: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v1-0-195de0bb1f8a@gmail.com
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>
To: "David S. Miller" <davem@davemloft.net>
To: Eric Dumazet <edumazet@google.com>
To: Jakub Kicinski <kuba@kernel.org>
To: Paolo Abeni <pabeni@redhat.com>
To: Chen-Yu Tsai <wens@kernel.org>
To: Jernej Skrabec <jernej.skrabec@gmail.com>
To: Samuel Holland <samuel@sholland.org>
To: Maxime Coquelin <mcoquelin.stm32@gmail.com>
To: Alexandre Torgue <alexandre.torgue@foss.st.com>
To: LABBE Corentin <clabbe.montjoie@gmail.com>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Maxime Ripard <mripard@kernel.org>
To: Giuseppe Cavallaro <peppe.cavallaro@st.com>
To: Jose Abreu <joabreu@synopsys.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@lists.linux.dev
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
---
James Hilliard (3):
net: stmmac: sun8i: reset the MAC after PHY initialization
dt-bindings: net: allwinner: add H616 EMAC1
net: stmmac: sun8i: add support for Allwinner H616 EMAC1
.../bindings/net/allwinner,sun8i-a83t-emac.yaml | 13 ++++
.../devicetree/bindings/net/snps,dwmac.yaml | 2 +
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 69 +++++++++++++---------
3 files changed, 57 insertions(+), 27 deletions(-)
---
base-commit: 014d795c73837ea2339a4ea8e8f82c6e959b845d
change-id: 20260914-submit-h616-emac1-v1-143703842abb
Best regards,
--
James Hilliard <james.hilliard1@gmail.com>
Comments
Hello: This series was applied to netdev/net-next.git (main) by Jakub Kicinski <kuba@kernel.org>: On Sun, 27 Sep 2026 12:52:18 -0600 you wrote: > The H616 secondary EMAC supports RMII at 10/100 Mbps and uses a separate > system-control clock register at offset 0x34. Add its binding and a > sun8i stmmac variant using that register. A distinct compatible without > an older fallback prevents the driver from using EMAC0's clock register. > > EMAC1 connects internally to the co-packaged AC200 or AC300 EPHY and has > no external PHY pins. Leave PHY initialization to the PHY driver instead > of using the H3 internal-PHY controls. The RMII-only variant does not > expose the RGMII clock-delay properties. > > [...] Here is the summary with links: - [net-next,v6,1/3] net: stmmac: sun8i: reset the MAC after PHY initialization https://git.kernel.org/netdev/net-next/c/fee9c17671b6 - [net-next,v6,2/3] dt-bindings: net: allwinner: add H616 EMAC1 https://git.kernel.org/netdev/net-next/c/1cf9c2ac57fd - [net-next,v6,3/3] net: stmmac: sun8i: add support for Allwinner H616 EMAC1 https://git.kernel.org/netdev/net-next/c/61240e48a67d You are awesome, thank you!