@@ -29510,6 +29510,7 @@ M: James Hilliard <james.hilliard1@gmail.com>
L: linux-sunxi@lists.linux.dev
S: Maintained
F: Documentation/devicetree/bindings/mfd/x-powers,ac200.yaml
+F: drivers/mfd/ac200.c
F: include/dt-bindings/mfd/x-powers,ac200.h
X-POWERS AXP288 PMIC DRIVERS
@@ -205,6 +205,21 @@ config MFD_AC100
This driver include only the core APIs. You have to select individual
components like codecs or RTC under the corresponding menus.
+config MFD_AC200
+ tristate "X-Powers AC200"
+ depends on COMMON_CLK
+ depends on I2C
+ depends on OF
+ select MFD_CORE
+ select REGMAP_I2C
+ select REGMAP_IRQ
+ help
+ Support for the X-Powers AC200 mixed-signal companion IC. The AC200
+ contains audio, video, RTC and Fast Ethernet PHY functions and is
+ co-packaged with some Allwinner H6 and H616 SoCs. This driver provides
+ the shared register access and instantiates the individual function
+ devices.
+
config MFD_AXP20X
tristate
select MFD_CORE
@@ -150,6 +150,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
obj-$(CONFIG_MFD_AC100) += ac100.o
+obj-$(CONFIG_MFD_AC200) += ac200.o
obj-$(CONFIG_MFD_AXP20X) += axp20x.o
obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
new file mode 100644
@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MFD core driver for the X-Powers AC200
+ *
+ * Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@gmail.com>
+ * Copyright (C) 2026 James Hilliard <james.hilliard1@gmail.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+
+#include <dt-bindings/mfd/x-powers,ac200.h>
+
+#define AC200_SYS_CONTROL_REG 0x0002
+#define AC200_SYS_CONTROL_CHIP_RESET_DEASSERT BIT(0)
+#define AC200_SYS_IRQ_ENABLE_REG 0x0004
+#define AC200_SYS_IRQ_INTB_ENABLE BIT(15)
+#define AC200_SYS_IRQ_INTB_ACTIVE_HIGH BIT(14)
+#define AC200_SYS_IRQ_RTC BIT(12)
+#define AC200_SYS_IRQ_EPHY BIT(8)
+#define AC200_SYS_IRQ_TVE BIT(4)
+#define AC200_SYS_IRQ_STATUS_REG 0x0006
+
+/* Interface register accessible from every register page. */
+#define AC200_TWI_REG_ADDR_H 0x00fe
+#define AC200_MAX_REG 0xa1f2
+
+static const struct regmap_range_cfg ac200_range_cfg[] = {
+ {
+ .range_max = AC200_MAX_REG,
+ .selector_reg = AC200_TWI_REG_ADDR_H,
+ .selector_mask = 0xff,
+ .window_len = 256,
+ },
+};
+
+/*
+ * Each AC200 sub-block can reset independently, invalidating its register
+ * contents without regmap's knowledge. Cache only the common page selector;
+ * this avoids a selector read-modify-write for every access on the same page
+ * without ever returning stale functional-register values.
+ */
+static bool ac200_volatile_reg(struct device *dev, unsigned int reg)
+{
+ return reg != AC200_TWI_REG_ADDR_H;
+}
+
+static const struct regmap_config ac200_regmap_config = {
+ .name = "ac200",
+ .reg_bits = 8,
+ .reg_stride = 2,
+ .val_bits = 16,
+ .ranges = ac200_range_cfg,
+ .num_ranges = ARRAY_SIZE(ac200_range_cfg),
+ .max_register = AC200_MAX_REG,
+ .volatile_reg = ac200_volatile_reg,
+ .cache_type = REGCACHE_MAPLE,
+};
+
+static const struct regmap_irq ac200_irqs[] = {
+ REGMAP_IRQ_REG(AC200_IRQ_TVE, 0, AC200_SYS_IRQ_TVE),
+ REGMAP_IRQ_REG(AC200_IRQ_EPHY, 0, AC200_SYS_IRQ_EPHY),
+ REGMAP_IRQ_REG(AC200_IRQ_RTC, 0, AC200_SYS_IRQ_RTC),
+};
+
+/*
+ * SYS_IRQ_ENABLE is an enable register rather than a mask register, hence
+ * unmask_base. SYS_IRQ_STATUS reflects the source levels, so the function
+ * which raised an interrupt is responsible for clearing it.
+ */
+static const struct regmap_irq_chip ac200_irq_chip = {
+ .name = "ac200",
+ .status_base = AC200_SYS_IRQ_STATUS_REG,
+ .unmask_base = AC200_SYS_IRQ_ENABLE_REG,
+ .num_regs = 1,
+ .irqs = ac200_irqs,
+ .num_irqs = ARRAY_SIZE(ac200_irqs),
+};
+
+static const struct mfd_cell ac200_cells[] = {
+ {
+ .name = "ac200-codec",
+ .of_compatible = "x-powers,ac200-codec",
+ }, {
+ .name = "ac200-tve",
+ .of_compatible = "x-powers,ac200-tve",
+ },
+};
+
+static void ac200_disable_intb(void *data)
+{
+ struct regmap *regmap = data;
+ int ret;
+
+ ret = regmap_clear_bits(regmap, AC200_SYS_IRQ_ENABLE_REG,
+ AC200_SYS_IRQ_INTB_ENABLE);
+ if (ret)
+ dev_err(regmap_get_device(regmap), "failed to disable INTB: %d\n",
+ ret);
+}
+
+static int ac200_init_irq(struct device *dev, struct regmap *regmap, int irq)
+{
+ struct regmap_irq_chip_data *irq_data;
+ unsigned int trigger;
+ u16 value = 0;
+ int ret;
+
+ trigger = irq_get_trigger_type(irq);
+ if (trigger == IRQ_TYPE_NONE)
+ trigger = IRQ_TYPE_LEVEL_LOW;
+
+ switch (trigger) {
+ case IRQ_TYPE_LEVEL_HIGH:
+ value |= AC200_SYS_IRQ_INTB_ACTIVE_HIGH;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ break;
+ default:
+ return dev_err_probe(dev, -EINVAL,
+ "INTB is level triggered, not type %u\n",
+ trigger);
+ }
+
+ /* Keep INTB disabled until the sources are masked and the IRQ is ready. */
+ ret = regmap_update_bits(regmap, AC200_SYS_IRQ_ENABLE_REG,
+ AC200_SYS_IRQ_INTB_ENABLE |
+ AC200_SYS_IRQ_INTB_ACTIVE_HIGH, value);
+ if (ret)
+ return ret;
+
+ ret = devm_regmap_add_irq_chip(dev, regmap, irq, trigger | IRQF_ONESHOT, 0,
+ &ac200_irq_chip, &irq_data);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to add IRQ chip\n");
+
+ /* Disable INTB before the IRQ chip and regmap are released. */
+ ret = devm_add_action_or_reset(dev, ac200_disable_intb, regmap);
+ if (ret)
+ return ret;
+
+ return regmap_set_bits(regmap, AC200_SYS_IRQ_ENABLE_REG,
+ AC200_SYS_IRQ_INTB_ENABLE);
+}
+
+static int ac200_add_devices(struct device *dev)
+{
+ struct mfd_cell cells[ARRAY_SIZE(ac200_cells)];
+ unsigned int num_cells = 0;
+ unsigned int i;
+ int ret;
+
+ for (i = 0; i < ARRAY_SIZE(ac200_cells); i++) {
+ const struct mfd_cell *cell = &ac200_cells[i];
+ struct device_node *child;
+
+ child = of_get_compatible_child(dev->of_node,
+ cell->of_compatible);
+ if (!child)
+ continue;
+ if (of_device_is_available(child))
+ cells[num_cells++] = *cell;
+ of_node_put(child);
+ }
+
+ if (!num_cells)
+ return 0;
+
+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, num_cells,
+ NULL, 0, NULL);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to add function devices\n");
+
+ return 0;
+}
+
+static int ac200_probe(struct i2c_client *client)
+{
+ struct device *dev = &client->dev;
+ struct regmap *regmap;
+ struct clk *clk;
+ int ret;
+
+ clk = devm_clk_get_enabled(dev, NULL);
+ if (IS_ERR(clk))
+ return dev_err_probe(dev, PTR_ERR(clk),
+ "failed to enable input clock\n");
+
+ ret = devm_clk_rate_exclusive_get(dev, clk);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to lock clock rate\n");
+
+ /*
+ * No minimum delay is documented. Retain the BSP resume path's 40 ms wait
+ * after enabling the input clock and before register access.
+ */
+ msleep(40);
+
+ regmap = devm_regmap_init_i2c(client, &ac200_regmap_config);
+ if (IS_ERR(regmap))
+ return dev_err_probe(dev, PTR_ERR(regmap),
+ "failed to initialize regmap\n");
+
+ ret = regmap_set_bits(regmap, AC200_SYS_CONTROL_REG,
+ AC200_SYS_CONTROL_CHIP_RESET_DEASSERT);
+ if (ret)
+ return ret;
+
+ if (client->irq > 0) {
+ ret = ac200_init_irq(dev, regmap, client->irq);
+ if (ret)
+ return ret;
+ }
+
+ /* AC200 and its children do not perform DMA. */
+ dev->coherent_dma_mask = 0;
+ dev->dma_mask = &dev->coherent_dma_mask;
+
+ return ac200_add_devices(dev);
+}
+
+static const struct of_device_id ac200_of_match[] = {
+ { .compatible = "x-powers,ac200" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ac200_of_match);
+
+static const struct i2c_device_id ac200_i2c_ids[] = {
+ { .name = "ac200" },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ac200_i2c_ids);
+
+static struct i2c_driver ac200_driver = {
+ .driver = {
+ .name = "ac200",
+ .of_match_table = ac200_of_match,
+ },
+ .probe = ac200_probe,
+ .id_table = ac200_i2c_ids,
+};
+module_i2c_driver(ac200_driver);
+
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@gmail.com>");
+MODULE_AUTHOR("James Hilliard <james.hilliard1@gmail.com>");
+MODULE_DESCRIPTION("X-Powers AC200 MFD core driver");
+MODULE_LICENSE("GPL");