diff mbox series

[v3,2/2] arm64: dts: allwinner: h616: orangepi-zero2w: add SDIO WiFi/BT (AW859A)

Message ID 20260923112009.1062-2-anykey196@gmail.com (mailing list archive)
State New
Headers
Series [v3,1/2] arm64: dts: allwinner: h616: orangepi-zero2w: add 24-pin expansion overlay |

Commit Message

Влад СВН Sept. 23, 2026, 11:20 a.m. UTC 
Enable the SDIO bus (mmc1) and power the on-board AW859A (UWE5622)
WiFi/BT combo through an mmc-pwrseq-simple that resets WL_REG_ON (PG18) and
gates the RTC 32 kHz fanout clock (PG10), with the 3.3 V and 1.8 V supplies.

The pwrseq clock must be named "ext_clock" (what mmc-pwrseq-simple requests)
and its output pin must be muxed to the clock function, as done for the other
H616/H618 boards.

Tested on: OrangePi Zero 2W (Allwinner H618) with the out-of-tree uwe5622 driver.

Signed-off-by: Vladimir <anykey196@gmail.com>
---
 .../allwinner/sun50i-h618-orangepi-zero2w.dts | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)

Comments

Andre Przywara Sept. 23, 2026, 1:58 p.m. UTC | #1 
Hi,

your threading looks somewhat off, and you are missing a cover letter, 
so I am a bit lost in here. But just jumping in here:

On 9/23/26 13:20, Vladimir wrote:
> Enable the SDIO bus (mmc1) and power the on-board AW859A (UWE5622)
> WiFi/BT combo through an mmc-pwrseq-simple that resets WL_REG_ON (PG18) and
> gates the RTC 32 kHz fanout clock (PG10), with the 3.3 V and 1.8 V supplies.
> 
> The pwrseq clock must be named "ext_clock" (what mmc-pwrseq-simple requests)
> and its output pin must be muxed to the clock function, as done for the other
> H616/H618 boards.
> 
> Tested on: OrangePi Zero 2W (Allwinner H618) with the out-of-tree uwe5622 driver.
> 
> Signed-off-by: Vladimir <anykey196@gmail.com>
> ---
>   .../allwinner/sun50i-h618-orangepi-zero2w.dts | 42 +++++++++++++++++++
>   1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> index ff9b40352a5..39f580af15b 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> @@ -189,3 +189,45 @@ &usbphy {
>   	usb1_vbus-supply = <&reg_vcc5v>;
>   	status = "okay";
>   };
> +
> +/ {
> +	reg_vcc33_wifi: vcc33-wifi {
> +		/* Always-on 3.3V regulator for WiFi and BT */

Why is this a separate regulator? Looking at the schematics, the WiFi 
chip seems supplied by VCC-WIFI, which is connected to DCDCE/VDD33, 
which is already modelled as reg_vcc3v3, in the .dts file.

> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc33-wifi";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-always-on;
> +		vin-supply = <&reg_vcc5v>;
> +	};
> +
> +	reg_vcc_wifi_io: vcc-wifi-io {
> +		/* Always-on 1.8V regulator for WiFi and BT IO */

Same here, VCC-WIFI-IO, which is supplied by aldo1. It's naturally the 
same voltage as the PortG supply, already specified in the "pio" node.

So I think those two regulators can go, and ...

> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc-wifi-io";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		regulator-always-on;
> +		vin-supply = <&reg_vcc33_wifi>;
> +	};
> +
> +	wifi_pwrseq: wifi-pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +		clocks = <&rtc CLK_OSC32K_FANOUT>;
> +		clock-names = "ext_clock";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&x32clk_fanout_pin>;
> +		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;	/* PG18 */
> +		post-power-on-delay-ms = <200>;
> +	};
> +};
> +
> +&mmc1 {
> +	vmmc-supply = <&reg_vcc33_wifi>;
> +	vqmmc-supply = <&reg_vcc_wifi_io>;

... be replaced here with &reg_vcc3v3 and &aldo1, respectively.

And this is all depending on that we actually make DT changes for 
devices which don't have a binding, and for which we don't specify a 
child node in here.

Cheers,
Andre

> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	bus-width = <4>;
> +	non-removable;
> +	mmc-ddr-1_8v;
 > +	status = "okay";> +};
Влад СВН Sept. 24, 2026, 2:42 p.m. UTC | #2 
I'd better rework my patch and letter, do more testing and then resend it.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
index ff9b40352a5..39f580af15b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
@@ -189,3 +189,45 @@  &usbphy {
 	usb1_vbus-supply = <&reg_vcc5v>;
 	status = "okay";
 };
+
+/ {
+	reg_vcc33_wifi: vcc33-wifi {
+		/* Always-on 3.3V regulator for WiFi and BT */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc33-wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc5v>;
+	};
+
+	reg_vcc_wifi_io: vcc-wifi-io {
+		/* Always-on 1.8V regulator for WiFi and BT IO */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-wifi-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc33_wifi>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rtc CLK_OSC32K_FANOUT>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&x32clk_fanout_pin>;
+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;	/* PG18 */
+		post-power-on-delay-ms = <200>;
+	};
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc33_wifi>;
+	vqmmc-supply = <&reg_vcc_wifi_io>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	mmc-ddr-1_8v;
+	status = "okay";
+};