@@ -326,7 +326,7 @@ static int loongson_dwmac_setup(void *apriv, struct mac_device_info *mac)
* original value so the correct HW-interface would be selected.
*/
if (ld->multichan) {
- priv->synopsys_id = DWMAC_CORE_3_70;
+ priv->snpsver = DWMAC_CORE_3_70;
*dma = dwmac1000_dma_ops;
dma->init_chan = loongson_dwmac_dma_init_channel;
dma->dma_interrupt = loongson_dwmac_dma_interrupt;
@@ -1069,7 +1069,7 @@ static int sun8i_dwmac_setup(void *ppriv, struct mac_device_info *mac)
mac->unicast_filter_entries = 8;
/* Synopsys Id is not available */
- priv->synopsys_id = 0;
+ priv->snpsver = 0;
return 0;
}
@@ -380,7 +380,7 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4;
dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3;
dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1;
- if (dma_cap->mbps_1000 && priv->synopsys_id >= DWXGMAC_CORE_2_20)
+ if (dma_cap->mbps_1000 && priv->snpsver >= DWXGMAC_CORE_2_20)
dma_cap->mbps_10_100 = 1;
/* MAC HW feature 1 */
@@ -72,7 +72,7 @@ static int stmmac_dwmac1_quirks(struct stmmac_priv *priv)
dev_info(priv->device, "Enhanced/Alternate descriptors\n");
/* GMAC older than 3.50 has no extended descriptors */
- if (priv->synopsys_id >= DWMAC_CORE_3_50) {
+ if (priv->snpsver >= DWMAC_CORE_3_50) {
dev_info(priv->device, "Enabled extended descriptors\n");
priv->extend_desc = true;
} else {
@@ -299,7 +299,7 @@ stmmac_hwif_find(enum dwmac_core_type core_type, u8 snpsver, u8 userver)
if (core_type != entry->core_type)
continue;
- /* Use synopsys_id var because some setups can override this */
+ /* Use snpsver var because some setups can override this */
if (snpsver < entry->min_snpsver)
continue;
if (core_type == DWMAC_CORE_XGMAC &&
@@ -324,7 +324,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
stmmac_get_version(priv, &version);
/* Save ID for later use */
- priv->synopsys_id = version.snpsver;
+ priv->snpsver = version.snpsver;
/* Lets assume some safe values first */
if (core_type == DWMAC_CORE_GMAC4) {
@@ -355,8 +355,8 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
/* Fallback to generic HW */
- /* Use synopsys_id var because some setups can override this */
- entry = stmmac_hwif_find(core_type, priv->synopsys_id, version.userver);
+ /* Use snpsver var because some setups can override this */
+ entry = stmmac_hwif_find(core_type, priv->snpsver, version.userver);
if (!entry) {
dev_err(priv->device,
"Failed to find HW IF (id=0x%x, gmac=%d/%d)\n",
@@ -304,7 +304,7 @@ struct stmmac_priv {
struct dma_features dma_cap;
struct stmmac_counters mmc;
int hw_cap_support;
- int synopsys_id;
+ u8 snpsver;
u32 msg_enable;
/* Our MAC Wake-on-Lan options */
int wolopts;
@@ -553,7 +553,7 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
priv->xstats.phy_eee_wakeup_error_n = val;
}
- if (priv->synopsys_id >= DWMAC_CORE_3_50)
+ if (priv->snpsver >= DWMAC_CORE_3_50)
stmmac_mac_debug(priv, priv->ioaddr,
(void *)&priv->xstats,
rx_queues_count, tx_queues_count);
@@ -755,7 +755,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev,
config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
ptp_v2 = PTP_TCR_TSVER2ENA;
snap_type_sel = PTP_TCR_SNAPTYPSEL_1;
- if (priv->synopsys_id < DWMAC_CORE_4_10)
+ if (priv->snpsver < DWMAC_CORE_4_10)
ts_event_en = PTP_TCR_TSEVNTENA;
ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA;
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
@@ -6624,7 +6624,7 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v)
seq_printf(seq, "\tAV features: %s\n", (priv->dma_cap.av) ? "Y" : "N");
seq_printf(seq, "\tChecksum Offload in TX: %s\n",
(priv->dma_cap.tx_coe) ? "Y" : "N");
- if (priv->synopsys_id >= DWMAC_CORE_4_00 ||
+ if (priv->snpsver >= DWMAC_CORE_4_00 ||
priv->plat->core_type == DWMAC_CORE_XGMAC) {
seq_printf(seq, "\tIP Checksum Offload in RX: %s\n",
(priv->dma_cap.rx_coe) ? "Y" : "N");
@@ -7454,7 +7454,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
if (priv->plat->rx_coe) {
priv->hw->rx_csum = priv->plat->rx_coe;
dev_info(priv->device, "RX Checksum Offload Engine supported\n");
- if (priv->synopsys_id < DWMAC_CORE_4_00)
+ if (priv->snpsver < DWMAC_CORE_4_00)
dev_info(priv->device, "COE Type %d\n", priv->hw->rx_csum);
}
if (priv->plat->tx_coe)
@@ -7520,7 +7520,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
* has to be disable and this can be done by passing the
* riwt_off field from the platform.
*/
- if ((priv->synopsys_id >= DWMAC_CORE_3_50 ||
+ if ((priv->snpsver >= DWMAC_CORE_3_50 ||
priv->plat->core_type == DWMAC_CORE_XGMAC) &&
!priv->plat->riwt_off) {
priv->use_riwt = 1;
@@ -7897,7 +7897,7 @@ static int __stmmac_dvr_probe(struct device *device,
/* Only DWMAC core version 5.20 onwards supports HW descriptor prefetch.
*/
- if (priv->synopsys_id < DWMAC_CORE_5_20)
+ if (priv->snpsver < DWMAC_CORE_5_20)
priv->plat->dma_cfg->dche = false;
stmmac_check_ether_addr(priv);
@@ -7997,7 +7997,7 @@ static int __stmmac_dvr_probe(struct device *device,
if (priv->plat->core_type == DWMAC_CORE_XGMAC)
ndev->max_mtu = XGMAC_JUMBO_LEN;
- else if (priv->plat->enh_desc || priv->synopsys_id >= DWMAC_CORE_4_00)
+ else if (priv->plat->enh_desc || priv->snpsver >= DWMAC_CORE_4_00)
ndev->max_mtu = JUMBO_LEN;
else
ndev->max_mtu = SKB_MAX_HEAD(NET_SKB_PAD + NET_IP_ALIGN);
@@ -74,7 +74,7 @@ static void stmmac_xgmac2_c22_format(struct stmmac_priv *priv, int phyaddr,
{
u32 tmp = 0;
- if (priv->synopsys_id < DWXGMAC_CORE_2_20) {
+ if (priv->snpsver < DWXGMAC_CORE_2_20) {
/* Until ver 2.20 XGMAC does not support C22 addr >= 4. Those
* bits above bit 3 of XGMAC_MDIO_C22P register are reserved.
*/
@@ -136,7 +136,7 @@ static int stmmac_xgmac2_mdio_read_c22(struct mii_bus *bus, int phyaddr,
u32 addr;
/* Until ver 2.20 XGMAC does not support C22 addr >= 4 */
- if (priv->synopsys_id < DWXGMAC_CORE_2_20 &&
+ if (priv->snpsver < DWXGMAC_CORE_2_20 &&
phyaddr > MII_XGMAC_MAX_C22ADDR)
return -ENODEV;
@@ -199,7 +199,7 @@ static int stmmac_xgmac2_mdio_write_c22(struct mii_bus *bus, int phyaddr,
u32 addr;
/* Until ver 2.20 XGMAC does not support C22 addr >= 4 */
- if (priv->synopsys_id < DWXGMAC_CORE_2_20 &&
+ if (priv->snpsver < DWXGMAC_CORE_2_20 &&
phyaddr > MII_XGMAC_MAX_C22ADDR)
return -ENODEV;
@@ -625,7 +625,7 @@ int stmmac_mdio_register(struct net_device *ndev)
new_bus->read_c45 = &stmmac_xgmac2_mdio_read_c45;
new_bus->write_c45 = &stmmac_xgmac2_mdio_write_c45;
- if (priv->synopsys_id < DWXGMAC_CORE_2_20) {
+ if (priv->snpsver < DWXGMAC_CORE_2_20) {
/* Right now only C22 phys are supported */
max_addr = MII_XGMAC_MAX_C22ADDR;