diff mbox series

[v3,3/4] arm: dts: allwinner: t113s: add hstimer node

Message ID 20260428-h616-t113s-hstimer-v3-3-7e02178a93ee@mmpsystems.pl (mailing list archive)
State New
Headers
Series Add hstimer support for H616 and T113-S3 |

Commit Message

Michal Piekos April 28, 2026, 4:27 p.m. UTC 
Describe high speed timer block on Allwinner T113-S3.

Tested on LCPI-PC-T113/F113:
- hstimer is registered as clocksource
- switching clocksource at runtime works
- after rating increase hstimer operates as a broadcast clockevent device

Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
 arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Chen-Yu Tsai May 5, 2026, 2:36 p.m. UTC | #1 
On Wed, Apr 29, 2026 at 12:29 AM Michal Piekos
<michal.piekos@mmpsystems.pl> wrote:
>
> Describe high speed timer block on Allwinner T113-S3.
>
> Tested on LCPI-PC-T113/F113:
> - hstimer is registered as clocksource
> - switching clocksource at runtime works
> - after rating increase hstimer operates as a broadcast clockevent device
>
> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>

Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
Chen-Yu Tsai May 5, 2026, 2:39 p.m. UTC | #2 
On Wed, Apr 29, 2026 at 12:29 AM Michal Piekos
<michal.piekos@mmpsystems.pl> wrote:
>
> Describe high speed timer block on Allwinner T113-S3.
>
> Tested on LCPI-PC-T113/F113:
> - hstimer is registered as clocksource
> - switching clocksource at runtime works
> - after rating increase hstimer operates as a broadcast clockevent device
>
> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
> ---
>  arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
> index 424f4a2487e2..40e76cfc8a1d 100644
> --- a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
> +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
> @@ -34,6 +34,17 @@ cpu1: cpu@1 {
>                 };
>         };
>
> +       soc {
> +               hstimer@3008000 {
> +                       compatible = "allwinner,sun20i-d1-hstimer";
> +                       reg = <0x03008000 0x1000>;
> +                       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&ccu CLK_BUS_HSTIMER>;
> +                       resets = <&ccu RST_BUS_HSTIMER>;
> +               };
> +       };
> +

Actually this could probably be added to the common risc-v dtsi file instead:

    arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi

That way both the D1 and T113 / T113s benefit.

ChenYu

>         gic: interrupt-controller@1c81000 {
>                 compatible = "arm,gic-400";
>                 reg = <0x03021000 0x1000>,
>
> --
> 2.43.0
>
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
index 424f4a2487e2..40e76cfc8a1d 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
@@ -34,6 +34,17 @@  cpu1: cpu@1 {
 		};
 	};
 
+	soc {
+		hstimer@3008000 {
+			compatible = "allwinner,sun20i-d1-hstimer";
+			reg = <0x03008000 0x1000>;
+			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_HSTIMER>;
+			resets = <&ccu RST_BUS_HSTIMER>;
+		};
+	};
+
 	gic: interrupt-controller@1c81000 {
 		compatible = "arm,gic-400";
 		reg = <0x03021000 0x1000>,